A PD-based methodology to enhance efficiency in testbenches with random stimulation. - Carlos Ivan Castro Marquez; Marius Strum; Jiang Chau Wang (SBCCI, 2009)

Automatic generation of a parameter-domain-based functional input coverage model. - Carlos Ivan Castro Marquez; Marius Strum; Wang Jiang Chau (LATW, 2010)

Formally verifying an RTOS scheduling monitor IP core in embedded systems. - Carlos Ivan Castro Marquez; Marius Strum; Wang Jiang Chau; Fabian Vargas 001 (LATW, 2011)

A Functional Verification Methodology Based on Parameter Domains for Efficient Input Stimuli Generation and Coverage Modeling. - Carlos Ivan Castro Marquez; Edgar Leonardo Romero Tobar; Marius Strum; Jiang Chau Wang (J. Electron. Test., 2011)

Functional verification of complete sequential behaviors: A formal treatment of discrepancies between system-level and RTL descriptions. - Carlos Ivan Castro Marquez; Marius Strum; Jiang Chau Wang (IDT, 2013)

Formal equivalence checking between high-level and RTL hardware designs. - Carlos Ivan Castro Marquez; Marius Strum; Jiang Chau Wang (LATW, 2013)

A unified sequential equivalence checking approach to verify high-level functionality and protocol specification implementations in RTL designs. - Carlos Ivan Castro Marquez; Marius Strum; Jiang Chau Wang (LATW, 2014)

A Unified Sequential Equivalence Checking Methodology to Verify RTL Designs with High-Level Functional and Protocol Specification Models. - Carlos Ivan Castro Marquez; Marius Strum; Jiang Chau Wang (J. Electron. Test., 2015)