Test Generation for Highly Sequential Scan-Testable Circuits Through Logic Transformation. - M. Ray Mercer; Vishwani D. Agrawal; Carlos M. Roman (ITC, 1981)

Is there a crisis in hardware verification? - Carlos M. Roman (CHARME, 1997)

Model checking without hardware drivers. - Carlos M. Roman; Gary De Palma; Robert P. Kurshan (CHARME, 1997)