Lagarto I - Una plataforma hardware/software de arquitectura de computadoras para la academia e investigación. - Cristóbal Ramírez; César Hernández; Carlos Rojas Morales; Gustavo Mondragón García; Luis A. Villa-Vargas; Marco Antonio Ramírez 001 (Res. Comput. Sci., 2017)

An Academic RISC-V Silicon Implementation Based on Open-Source Components. - Jaume Abella 001; Calvin Bulla; Guillem Cabo; Francisco J. Cazorla; Adrián Cristal; Max Doblas; Roger Figueras; Alberto González 004; Carles Hernández 001; César Hernández; Víctor Jiménez; Leonidas Kosmidis; et al. (DCIS, 2020)

DVINO: A RISC-V Vector Processor Implemented in 65nm Technology. - Guillem Cabo; Gerard Candón; Xavier Carril; Max Doblas; Marc Domínguez; Alberto González 004; César Hernández; Víctor Jiménez; Vatistas Kostalampros; Rubén Langarita; Neiel Leyva; Guillem López-Paradís; et al. (DCIS, 2022)

Adaptable Register File Organization for Vector Processors. - Cristóbal Ramírez Lazo; Enrico Reggiani; Carlos Rojas Morales; Roger Figueras Bagué; Luis A. Villa Vargas; Marco Antonio Ramírez Salinas; Mateo Valero Cortés; Osman Sabri Unsal; Adrián Cristal (HPCA, 2022)

Lagarto I-Una plataforma hardware/software de arquitectura de computadoras para la academia e investigación. - Cristóbal Ramírez Lazo; César-Alejandro Hernández-Calderón; Carlos Rojas Morales; Gustavo Mondragón García; Luis Alfonso Villa Vargas; Marco Antonio Ramírez Salinas (CoRR, 2022)

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology. - Max Doblas; Gerard Candón; Xavier Carril; Marc Domínguez; Enric Erra; Alberto González 004; César Hernández; Víctor Jiménez; Vatistas Kostalampros; Rubén Langarita; Neiel Leyva; Guillem López-Paradís; et al. (DCIS, 2023)

FAUST: Design and implementation of a pipelined RISC-V vector floating-point unit. - Mate Kovac; Leon Dragic; Branimir Malnar; Francesco Minervini; Oscar Palomar; Carlos Rojas 001; Mauro Olivieri; Josip Knezovic; Mario Kovac (Microprocess. Microsystems, 2023)

Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications. - Francesco Minervini; Oscar Palomar; Osman S. Unsal; Enrico Reggiani; Josue V. Quiroga; Joan Marimon; Carlos Rojas 001; Roger Figueras; Abraham Ruiz; Alberto González 004; Jonnatan Mendoza; Iván Vargas 001; et al. (ACM Trans. Archit. Code Optim., 2023)

QUETZAL: Vector Acceleration Framework for Modern Genome Sequence Analysis Algorithms. - Julian Pavon; Iván Vargas Valdivieso; Carlos Rojas 001; César Hernández; Mehmet Aslan; Roger Figueras; Yichao Yuan; Joël Lindegger; Mohammed Alser; Francesc Moll; Santiago Marco-Sola; Oguz Ergin; et al. (ISCA, 2024)

Enhancing Fault Tolerance in High-Performance Computing: A Real Hardware Case Study on a RISC-V Vector Processing Unit. - Marcello Barbirotta; Francesco Minervini; Carlos Rojas Morales; Adrián Cristal; Osman S. Unsal; Mauro Olivieri (IEEE Open J. Comput. Soc., 2024)

UPSORT: Design and Analysis of Processing-in-Memory Sorting Algorithms using UPMEM. - Iván Vargas Vadivieso; Julian Pavon; Carlos Rojas 001; Javier Chavez Rubio; Marco A. Ramírez 001; Luis Villa 001; Mateo Valero; Osman S. Unsal; Adrián Cristal (ISPASS, 2026)