Floating Point or LNS: Choosing the Right Arithmetic on an Aapplication Basis. - Caroline Collange; Jérémie Detrey; Florent de Dinechin (DSD, 2006)

Graphic processors to speed-up simulations for the design of high performance solar receptors. - Caroline Collange; Marc Daumas; David Defour (ASAP, 2007)

LNS Subtraction Using Novel Cotransformation and/or Interpolation. - Panagiotis D. Vouzis; Caroline Collange; Mark G. Arnold (ASAP, 2007)

Cotransformation Provides Area and Accuracy Improvement in an HDL Library for LNS Subtraction. - Panagiotis D. Vouzis; Caroline Collange; Mark G. Arnold (DSD, 2007)

Monte Carlo Logarithmic Number System for Model Predictive Control. - Panagiotis D. Vouzis; Caroline Collange; Mark G. Arnold; Mayuresh V. Kothare (FPL, 2007)

Line-by-line spectroscopic simulations on graphics processing units. - Caroline Collange; Marc Daumas; David Defour (Comput. Phys. Commun., 2008)

État de l'intégration de la virgule flottante dans les processeurs graphiques. - Caroline Collange; Marc Daumas; David Defour (Tech. Sci. Informatiques, 2008)

A Dual-Purpose Real/Complex Logarithmic Number System ALU. - Mark G. Arnold; Caroline Collange (IEEE Symposium on Computer Arithmetic, 2009)

Dynamic Detection of Uniform and Affine Vectors in GPGPU Computations. - Caroline Collange; David Defour; Yao Zhang (Euro-Par Workshops, 2009)

Using Graphics Processors for Parallelizing Hash-Based Data Carving. - Caroline Collange; Yoginder S. Dandass; Marc Daumas; David Defour (HICSS, 2009)

Power Consumption of GPUs from a Software Perspective. - Caroline Collange; David Defour; Arnaud Tisserand (ICCS (1), 2009)

Implementing LNS using filtering units of GPUs. - Mark G. Arnold; Caroline Collange; David Defour (ICASSP, 2010)

Barra: A Parallel Functional Simulator for GPGPU. - Caroline Collange; Marc Daumas; David Defour; David Parello (MASCOTS, 2010)

A Novel Cotransformation for LNS Subtraction. - Panagiotis D. Vouzis; Caroline Collange; Mark G. Arnold (J. Signal Process. Syst., 2010)

Enjeux de conception des architectures GPGPU : unités arithmétiques spécialisées et exploitation de la régularité. (Design challenges of GPGPU architectures: specialized arithmetic units and exploitation of regularity). - Caroline Collange (2010)

A Real/Complex Logarithmic Number System ALU. - Mark G. Arnold; Caroline Collange (IEEE Trans. Computers, 2011)

Simultaneous branch and warp interweaving for sustained GPU performance. - Nicolas Brunie; Caroline Collange; Gregory Frederick Diamos (ISCA, 2012)

Data and Instruction Uniformity in Minimal Multi-threading. - Teo Milanez; Caroline Collange; Fernando Magno Quintão Pereira; Wagner Meira Jr.; Renato Ferreira 001 (SBAC-PAD, 2012)

Divergence Analysis with Affine Constraints. - Diogo Sampaio; Rafael Martins de Souza; Caroline Collange; Fernando Magno Quintão Pereira (SBAC-PAD, 2012)

Spill Code Placement for SIMD Machines. - Diogo Nunes Sampaio; Elie Gedeon; Fernando Magno Quintão Pereira; Caroline Collange (SBLP, 2012)

The Denormal Logarithmic Number System. - Mark G. Arnold; Caroline Collange (ASAP, 2013)

Divergence analysis. - Diogo Sampaio; Rafael Martins de Souza; Caroline Collange; Fernando Magno Quintão Pereira (ACM Trans. Program. Lang. Syst., 2013)

Reconvergence de contrôle implicite pour les architectures SIMT. - Nicolas Brunie; Caroline Collange (Tech. Sci. Informatiques, 2013)

Reproducible and Accurate Matrix Multiplication. - Roman Iakymchuk; David Defour; Caroline Collange; Stef Graillat (SCAN, 2014)

Thread scheduling and memory coalescing for dynamic vectorization of SPMD workloads. - Teo Milanez; Caroline Collange; Fernando Magno Quintão Pereira; Wagner Meira Jr.; Renato Ferreira 001 (Parallel Comput., 2014)

Options for Denormal Representation in Logarithmic Arithmetic. - Mark G. Arnold; Caroline Collange (J. Signal Process. Syst., 2014)

Reproducible floating-point atomic addition in data-parallel environment. - David Defour; Caroline Collange (FedCSIS, 2015)

Reproducible Triangular Solvers for High-Performance Computing. - Roman Iakymchuk; David Defour; Caroline Collange; Stef Graillat (ITNG, 2015)

Fusion of Calling Sites. - Douglas do Couto Teixeira; Caroline Collange; Fernando Magno Quintão Pereira (SBAC-PAD, 2015)

Numerical reproducibility for the parallel reduction on multi- and many-core architectures. - Caroline Collange; David Defour; Stef Graillat; Roman Iakymchuk (Parallel Comput., 2015)

Parallel floating-point expansions for extended-precision GPU computations. - Caroline Collange; Mioara Joldes; Jean-Michel Muller; Valentina Popescu (ASAP, 2016)

Dynamic Inter-Thread Vectorization Architecture: Extracting DLP from TLP. - Sajith Kalathingal; Caroline Collange; Bharath Narasimha Swamy; André Seznec (SBAC-PAD, 2016)

Function Call Re-Vectorization. - Rubens E. A. Moreira; Caroline Collange; Fernando Magno Quintão Pereira (PPoPP, 2017)

Qubit allocation. - Marcos Yukio Siraichi; Vinícius Fernandes dos Santos; Caroline Collange; Fernando Magno Quintão Pereira (CGO, 2018)

DITVA: Dynamic Inter-Thread Vectorization Architecture. - Sajith Kalathingal; Caroline Collange; Bharath Narasimha Swamy; André Seznec (J. Parallel Distributed Comput., 2018)

Compressed Cache Layout Aware Prefetching. - Niloofar Charmchi; Caroline Collange; André Seznec (SBAC-PAD, 2019)

Qubit allocation as a combination of subgraph isomorphism and token swapping. - Marcos Yukio Siraichi; Vinícius Fernandes dos Santos; Caroline Collange; Fernando Magno Quintão Pereira (Proc. ACM Program. Lang., 2019)

SIMT-X: Extending Single-Instruction Multi-Threading to Out-of-Order Cores. - Anita Tino; Caroline Collange; André Seznec (ACM Trans. Archit. Code Optim., 2020)

Rapid Prototyping of Complex Micro-architectures Through High-Level Synthesis. - Sara Sadat Hoseininasab; Caroline Collange; Steven Derrien (ARC, 2023)