VLSI Design Synthesis with Testability. - Catherine H. Gebotys; Mohamed I. Elmasry (DAC, 1988)

Integrated design and test synthesis. - Catherine H. Gebotys; Mohamed I. Elmasry (ICCD, 1988)

Integration of algorithmic VLSI synthesis with testability incorporation. - Catherine H. Gebotys; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1989)

Simultaneous Scheduling and Allocation for Cost Constrained Optimal Architectural Synthesis. - Catherine H. Gebotys; Mohamed I. Elmasry (DAC, 1991)

Optimal Scheduling and Allocation of Embedded VLSI Chips. - Catherine H. Gebotys (DAC, 1992)

Optimal synthesis of multichip architectures. - Catherine H. Gebotys (ICCAD, 1992)

Optimal synthesis of high-performance architectures. - Catherine H. Gebotys; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1992)

Global optimization approach for architectural synthesis. - Catherine H. Gebotys; Mohamed I. Elmasry (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Throughput optimized architectural synthesis. - Catherine H. Gebotys (IEEE Trans. Very Large Scale Integr. Syst., 1993)

Synthesizing embedded speed-optimized architectures. - Catherine H. Gebotys (IEEE J. Solid State Circuits, 1993)

Application-Specific Architectures for Field-Programmable VLSI Technologies. - Catherine H. Gebotys; Robert J. Gebotys (HICSS (1), 1994)

An optimization approach to the synthesis of multichip architectures. - Catherine H. Gebotys (IEEE Trans. Very Large Scale Integr. Syst., 1994)

Optimized mapping of video applications to hardware-software for VLSI architectures. - Catherine H. Gebotys; Robert J. Gebotys (HICSS (1), 1995)

An optimal methodology for synthesis of DSP multichip architectures. - Catherine H. Gebotys (J. VLSI Signal Process., 1995)

Power Minimization in Heterogeneous Processing. - Catherine H. Gebotys; Robert J. Gebotys (HICSS (1), 1996)

Low Energy Memory and Register Allocation Using Network Flow. - Catherine H. Gebotys (DAC, 1997)

Performance-Power Optimization of Memory Components for Complex Embedded Systems. - Catherine H. Gebotys; Robert J. Gebotys (HICSS (5), 1997)

DSP address optimization using a minimum cost circulation technique. - Catherine H. Gebotys (ICCAD, 1997)

An Efficient Model for DSP Code Generation: Performance, Code Size, Estimated Energy. - Catherine H. Gebotys (ISSS, 1997)

Changing Interaction of Compiler and Architecture. - Sarita V. Adve; Doug Burger; Rudolf Eigenmann; Alasdair Rawsthorne; Michael D. Smith 001; Catherine H. Gebotys; Mahmut T. Kandemir; David J. Lilja; Alok N. Choudhary; Jesse Zhixi Fang; Pen-Chung Yew (Computer, 1997)

Complexities in DSP Software Compilation: Performance, Code Size Power, Retargetability. - Catherine H. Gebotys; Robert J. Gebotys (HICSS (3), 1998)

An empirical comparison of algorithmic, instruction, and architectural power prediction models for high performance embedded DSP processors. - Catherine H. Gebotys; Robert J. Gebotys (ISLPED, 1998)

Network Flow Approach to Data Regeneration for Low Energy Embedded System Synthesis. - Catherine H. Gebotys (Integr. Comput. Aided Eng., 1998)

Optimizing Energy During Systems Synthesis of Computer Intensive Realtime Applications. - Catherine H. Gebotys (VLSI Design, 1998)

Designing for Low Power in Complex Embedded DSP Systems. - Catherine H. Gebotys; Robert J. Gebotys (HICSS, 1999)

Statistically based prediction of power dissipation for complex embedded DSP processors. - Catherine H. Gebotys; Robert J. Gebotys (Microprocess. Microsystems, 1999)

A minimum-cost circulation approach to DSP address-code generation. - Catherine H. Gebotys (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Power minimization derived from architectural-usage of VLIW processors. - Catherine H. Gebotys; Robert J. Gebotys; S. Wiratunga (DAC, 2000)

Utilizing Memory Bandwidth in DSP Embedded Processors. - Catherine H. Gebotys (DAC, 2001)

Modeling Power Dynamics for an Embedded DSP Processor Core. An Empirical Model. - Catherine H. Gebotys; Radu Muresan (VLSI-SOC, 2001)

Current consumption dynamics at instruction and program level for a VLIW DSP processor. - Radu Muresan; Catherine H. Gebotys (ISSS, 2001)

Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor. - Catherine H. Gebotys; Robert J. Gebotys (CHES, 2002)

Security-Driven Exploration of Cryptography in DSP Cores. - Catherine H. Gebotys (ISSS, 2002)

Special Session: Security on SoC. - Hiroto Yasuura; Naofumi Takagi; Srivaths Ravi 001; Michael Torla; Catherine H. Gebotys (ISSS, 2002)

A network flow approach to memory bandwidth utilization in embedded DSP core processors. - Catherine H. Gebotys (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Security wrappers and power analysis for SoC technologies. - Catherine H. Gebotys; Y. Zhang (CODES+ISSS, 2003)

A Framework for Security on NoC Technologies. - Catherine H. Gebotys; Robert J. Gebotys (ISVLSI, 2003)

Low energy security optimization in embedded cryptographic systems. - Catherine H. Gebotys (CODES+ISSS, 2004)

Secure and safety-critical vs. insecure, non safety-critical embedded systems: do they require completely different design approaches? - Peter Marwedel; Catherine H. Gebotys (CODES+ISSS, 2004)

Current flattening in software and hardware for security applications. - Radu Muresan; Catherine H. Gebotys (CODES+ISSS, 2004)

Design of secure cryptography against the threat of power-attacks in DSP-embedded processors. - Catherine H. Gebotys (ACM Trans. Embed. Comput. Syst., 2004)

EM Analysis of Rijndael and ECC on a Wireless Java-Based PDA. - Catherine H. Gebotys; Simon Ho; C. C. Tiu (CHES, 2005)

A Countermeasure for EM Attack of a Wireless PDA. - Catherine H. Gebotys; C. C. Tiu; X. Chen (ITCC (1), 2005)

An Energy-Efficient Image Representation for Secure Mobile Systems. - Tim Woo; Catherine H. Gebotys; Sagar Naik (NETWORKING, 2005)

Instantaneous current modeling in a complex VLIW processor core. - Radu Muresan; Catherine H. Gebotys (ACM Trans. Embed. Comput. Syst., 2005)

Methodology for attack on a Java-based PDA. - Catherine H. Gebotys; Brian A. White (CODES+ISSS, 2006)

A split-mask countermeasure for low-energy secure embedded systems. - Catherine H. Gebotys (ACM Trans. Embed. Comput. Syst., 2006)

A table masking countermeasure for low-energy secure embedded systems. - Catherine H. Gebotys (IEEE Trans. Very Large Scale Integr. Syst., 2006)

A Phase Substitution Technique for DEMA of Embedded Cryptographic Systems. - Catherine H. Gebotys; Brian A. White (ITNG, 2007)

Enhanced Current-Balanced Logic (ECBL): An Area Efficient Solution to Secure Smart Cards against Differential Power Attack. - Amir Khatib Zadeh; Catherine H. Gebotys (ITNG, 2007)

An Approach for Recovering Satellites and their Cryptographic Capabilities in the Presence of SEUs and Attacks. - Marcio Juliato; Catherine H. Gebotys (AHS, 2008)

Forward-Secure Content Distribution to Reconfigurable Hardware. - David Champagne; Reouven Elbaz; Catherine H. Gebotys; Lionel Torres; Ruby B. Lee (ReConFig, 2008)

EM alignment using phase for secure embedded systems. - Catherine H. Gebotys; Brian A. White (Des. Autom. Embed. Syst., 2008)

Setting Speed Records with the (Fractional) Multibase Non-Adjacent Form Method for Efficient Elliptic Curve Scalar Multiplication. - Patrick Longa; Catherine H. Gebotys (IACR Cryptol. ePrint Arch., 2008)

Novel Precomputation Schemes for Elliptic Curve Cryptosystems. - Patrick Longa; Catherine H. Gebotys (IACR Cryptol. ePrint Arch., 2008)

EM analysis of a wireless Java-based PDA. - Catherine H. Gebotys; Brian A. White (ACM Trans. Embed. Comput. Syst., 2008)

Side channel aware leakage management in nanoscale Cryptosystem-on-Chip (CoC). - Amir Khatib Zadeh; Catherine H. Gebotys (ISQED, 2009)

Leakage Power and Side Channel Security of Nanoscale Cryptosystem-on-Chip (CoC). - Amir Khatib Zadeh; Catherine H. Gebotys (ISVLSI, 2009)

Efficient Technique for the FPGA Implementation of the AES MixColumns Transformation. - Solmaz Ghaznavi; Catherine H. Gebotys; Reouven Elbaz (ReConFig, 2009)

Tailoring a Reconfigurable Platform to SHA-256 and HMAC through Custom Instructions and Peripherals. - Marcio Juliato; Catherine H. Gebotys (ReConFig, 2009)

Fast Multibase Methods and Other Several Optimizations for Elliptic Curve Scalar Multiplication. - Patrick Longa; Catherine H. Gebotys (IACR Cryptol. ePrint Arch., 2009)

Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines. - Reouven Elbaz; David Champagne; Catherine H. Gebotys; Ruby B. Lee; Nachiketh R. Potlapally; Lionel Torres (Trans. Comput. Sci., 2009)

A new correlation frequency analysis of the side channel. - Edgar Mateos; Catherine H. Gebotys (WESS, 2010)

Faster Explicit Formulas for Computing Pairings over Ordinary Curves. - Diego F. Aranha; Koray Karabina; Patrick Longa; Catherine H. Gebotys; Julio López 002 (IACR Cryptol. ePrint Arch., 2010)

Efficient Techniques for High-Speed Elliptic Curve Cryptography. - Patrick Longa; Catherine H. Gebotys (IACR Cryptol. ePrint Arch., 2010)

Analysis of Efficient Techniques for Fast Elliptic Curve Cryptography on x86-64 based Processors. - Patrick Longa; Catherine H. Gebotys (IACR Cryptol. ePrint Arch., 2010)

SARFUM: Security Architecture for Remote FPGA Update and Monitoring. - Benoît Badrignans; David Champagne; Reouven Elbaz; Catherine H. Gebotys; Lionel Torres (ACM Trans. Reconfigurable Technol. Syst., 2010)

Counteracting power analysis attack using Static Single-ended Logic. - Amir Khatib Zadeh; Catherine H. Gebotys; Shahab Ardalan (ISCAS, 2011)

Editorial Introduction of New Associate Editors. - Krithi Ramamritham; Catherine H. Gebotys (IEEE Embed. Syst. Lett., 2013)

A Quantitative Analysis of a Novel SEU-Resistant SHA-2 and HMAC Architecture for Space Missions Security. - Marcio Juliato; Catherine H. Gebotys (IEEE Trans. Aerosp. Electron. Syst., 2013)

A Sliding Window Phase-Only Correlation Method for Side-Channel Alignment in a Smartphone. - Catherine H. Gebotys; Brian A. White (ACM Trans. Embed. Comput. Syst., 2015)

Preaveraging and Carry Propagate Approaches to Side-Channel Analysis of HMAC-SHA256. - Catherine H. Gebotys; Brian A. White; Edgar Mateos (ACM Trans. Embed. Comput. Syst., 2016)

A Propagation Rate Based Splitting Heuristic for Divide-and-Conquer Solvers. - Saeed Nejati; Zack Newsham; Joseph Scott; Jia Hui Liang; Catherine H. Gebotys; Pascal Poupart; Vijay Ganesh 001 (SAT, 2017)

Adaptive Restart and CEGAR-Based Solver for Inverting Cryptographic Hash Functions. - Saeed Nejati; Jia Hui Liang; Catherine H. Gebotys; Krzysztof Czarnecki 001; Vijay Ganesh 001 (VSTTE, 2017)

Algebraic Fault Attack on SHA Hash Functions Using Programmatic SAT Solvers. - Saeed Nejati; Jan Horácek; Catherine H. Gebotys; Vijay Ganesh 001 (CP, 2018)

PUFs Deep Attacks: Enhanced modeling attacks using deep learning techniques to break the security of double arbiter PUFs. - Mahmoud Khalafalla; Catherine H. Gebotys (DATE, 2019)

Methodology for EM Fault Injection: Charge-based Fault Model. - Haohao Liao; Catherine H. Gebotys (DATE, 2019)

Circumventing Uniqueness of XOR Arbiter PUFs. - Caio Hoffman; Catherine H. Gebotys; Diego F. Aranha; Mario Lúcio Côrtes; Guido Araújo (DSD, 2019)

Going Deep: Using deep learning techniques with simplified mathematical models against XOR BR and TBR PUFs (Attacks and Countermeasures). - Mahmoud Khalafalla; Mahmoud A. Elmohr; Catherine H. Gebotys (HOST, 2020)

EM Fault Injection on ARM and RISC-V. - Mahmoud A. Elmohr; Haohao Liao; Catherine H. Gebotys (ISQED, 2020)

Analysis of Dynamic Laser Injection and Quiescent Photon Emissions on an Embedded Processor. - Karim Amin; Catherine H. Gebotys; Mustafa Faraj; Haohao Liao (J. Hardw. Syst. Secur., 2020)

Quiescent photonics side channel analysis: Low cost SRAM readout attack. - Mustafa Faraj; Catherine H. Gebotys (Cryptogr. Commun., 2021)