26.6 A 5-to-6GHz Current-Mode Subharmonic Switching Digital Power Amplifier for Enhancing Power Back-Off Efficiency. - Aoyang Zhang; Ce Yang 004; Mostafa M. Ayesh; Mike Shuo-Wei Chen (ISSCC, 2021)

A Memristor-Based Analog Accelerator for Solving Quadratic Programming Problems. - Hsiang-Chun Cheng; Shiyu Su; Mayank Palaria; Qiaochu Zhang; Ce Yang 004; Sushmit Hossain; Ryan M. Bena; Buyun Chen; Zerui Liu; Juzheng Liu; Rezwan A. Rasul; Quan Nguyen 004; et al. (CICC, 2023)

Millimeter-Wave Receiver With Non-Uniform Time-Approximation Filter. - Ce Yang 004; Shiyu Su; Mike Shuo-Wei Chen (IEEE J. Solid State Circuits, 2023)

5.3 A 0.072mm2 18-to-21GHz Non-Uniform Sub-Sampling Receiver with a Non-Uniform Discrete-Time FIR Filter Achieving 42dB Blocker Rejection in 28nm CMOS. - Mostafa M. Ayesh; Soumya Mahapatra; Ce Yang 004; Mike Shuo-Wei Chen (ISSCC, 2024)

A Blocker-Tolerant Non-Uniform Sub-Sampling Receiver With a Non-Uniform Discrete-Time FIR Filter. - Mostafa M. Ayesh; Soumya Mahapatra; Ce Yang 004; Mike Shuo-Wei Chen (IEEE J. Solid State Circuits, 2024)

26.1: A 24GHz Direct Digital Transmitter Using Multiphase Subharmonic Switching PA Achieving 3.2Gb/s Data Rate and -30.8dB EVM in 65nm CMOS. - Soumya Mahapatra; Mostafa M. Ayesh; Ce Yang 004; Mayank Palaria; Shiyu Su; Aoyang Zhang; Mike Shuo-Wei Chen (ISSCC, 2025)

11.2 A Blocker-Tolerant Receiver with VCO-Based Non-Uniform Multi-Level Time-Approximation Filter with -36dB EVM in 28nm CMOS. - Ce Yang 004; Shiyu Su; Mostafa M. Ayesh; Soumya Mahapatra; Maysara M. Hamada; Vinay Chenna; Hossein Hashemi 001; Mike Shuo-Wei Chen (ISSCC, 2025)