Efficient modular SAT solving for IC3. - Sam Bayless; Celina G. Val; Thomas Ball 001; Holger H. Hoos; Alan J. Hu (FMCAD, 2013)

Formal co-validation of low-level hardware/software interfaces. - Alex Horn; Michael Tautschnig; Celina G. Val; Lihao Liang; Tom Melham; Jim Grundy; Daniel Kroening (FMCAD, 2013)

Efficient Coverage-Driven Stimulus Generation Using Simultaneous SAT Solving, with Application to SystemVerilog. - An-Che Cheng; Chia-Chih Jack Yen; Celina G. Val; Sam Bayless; Alan J. Hu; Iris Hui-Ru Jiang; Jing-Yang Jou (ACM Trans. Design Autom. Electr. Syst., 2014)

Precisely Measuring Quantitative Information Flow: 10K Lines of Code and Beyond. - Celina G. Val; Michael A. Enescu; Sam Bayless; William Aiello; Alan J. Hu (EuroS&P, 2016)