Data-rate-aware FPGA-based acceleration framework for streaming applications. - Siavash Rezaei; César-Alejandro Hernández-Calderón; Saeed Mirzamohammadi; Eli Bozorgzadeh; Alexander V. Veidenbaum; Alex Nicolau; Michael J. Prather (ReConFig, 2016)

Lagarto I RISC-V Multi-core: Research Challenges to Build and Integrate a Network-on-Chip. - Neiel I. Leyva-Santes; Ivan Perez 004; César-Alejandro Hernández-Calderón; Enrique Vallejo 001; Miquel Moretó; Ramón Beivide; Marco Antonio Ramírez Salinas; Luis A. Villa-Vargas (ISUM, 2019)

A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures. - Cristóbal Ramírez; César-Alejandro Hernández-Calderón; Oscar Palomar; Osman S. Unsal; Marco Antonio Ramírez; Adrián Cristal (ACM Trans. Archit. Code Optim., 2020)

Lagarto I-Una plataforma hardware/software de arquitectura de computadoras para la academia e investigación. - Cristóbal Ramírez Lazo; César-Alejandro Hernández-Calderón; Carlos Rojas Morales; Gustavo Mondragón García; Luis Alfonso Villa Vargas; Marco Antonio Ramírez Salinas (CoRR, 2022)