Dynamic voltage scheduling technique for low-power multimedia applications using buffers. - Chaeseok Im; Huiseok Kim; Soonhoi Ha (ISLPED, 2001)

An Energy Optimization Technique for Latency and Quality Constrained Video Applications. - Chaeseok Im; Soonhoi Ha (ESTIMedia, 2003)

Efficient exploration of on-chip bus architectures and memory allocation. - Sungchan Kim; Chaeseok Im; Soonhoi Ha (CODES+ISSS, 2004)

Dynamic voltage scaling for real-time multi-task scheduling using buffers. - Chaeseok Im; Soonhoi Ha (LCTES, 2004)

Energy Optimization for Latency- and Quality-Constrained Video Applications. - Chaeseok Im; Soonhoi Ha (IEEE Des. Test Comput., 2004)

Dynamic voltage scheduling with buffers in low-power multimedia applications. - Chaeseok Im; Soonhoi Ha; Huiseok Kim (ACM Trans. Embed. Comput. Syst., 2004)

Schedule-aware performance estimation of communication architecture for efficient design space exploration. - Sungchan Kim; Chaeseok Im; Soonhoi Ha (IEEE Trans. Very Large Scale Integr. Syst., 2005)

A Software Reproduction of Virtual Memory for Deeply Embedded Systems. - Keun Soo Yim; Jae Don Lee; Jungkeun Park; Jeong-Joon Yoo; Chaeseok Im; Yeonseung Ryu (ICCSA (1), 2006)

A real-time operating system for manycore systems. - Chaeseok Im; Minkyu Jeong; Jae Don Lee; Seungwon Lee; Shihwa Lee (SAC, 2012)

A dynamically reconfigurable operating system for manycore systems. - Chaeseok Im; Minkyu Jeong; Jaedon Lee; Seungwon Lee (SAC, 2013)

Source level offloading for special-purpose hardware accelerators. - Shin-gyu Kim; Chaeseok Im; Minwook Ahn; Seungwon Lee (ICCE, 2015)