Chandramouli Gopalakrishnan

According to our database1, Chandramouli Gopalakrishnan authored at least 11 papers between 2002 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2018
What I Look for When Hiring [Professional Development].
IEEE Consumer Electron. Mag., 2018

2017
Ten Things You Should Never Have on Your Resume [Professional Development].
IEEE Consumer Electron. Mag., 2017

2012
A Case Study in Developing an Efficient Multi-threaded EDA Parser: Synopsys SDF Parser.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Methodology for Efficient Multi-threading of Parsers in EDA Tools.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

2005
Leakage Power Driven Behavioral Synthesis of Pipelined Datapaths.
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

2004
Tabu Search Based Behavioral Synthesis of Low Leakage Datapaths.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

2003
Resource Allocation and Binding Approach for Low Leakage Power.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

An Architectural Leakage Power Simulator for VHDL Structural Datapaths.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

KnapBind: An Area-Efficient Binding Algorithm for Low-leakage Datapaths.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002
Behavioral synthesis of datapaths with low leakage power.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Power Optimization of Combinational Circuits by Input Transformations.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002


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