An improved high speed fully pipelined 500 MHz 8×8 baugh wooley multiplier design using 0.6 μm CMOS TSPC logic design style. - Abhijit R. Asati; Chandrashekhar (ICIIS, 2008)

Design and Development of Self-Recharging Electric Bicycle. - Bansilal Bairwa; Chandrashekhar; M. Sai Diksheeth; S. B. Shivayya; Cm Varun (ICCCNT, 2024)