Supply noise insensitive bandgap regulator using capacitive charge pump DC-DC converter. - Chang-Hyeon Lee; K. McCellan; John Choma Jr. (ISCAS (6), 1999)

A supply-noise-insensitive CMOS PLL with a voltage regulator using DC-DC capacitive converter. - Chang-Hyeon Lee; Kelly McClellan; John Choma Jr. (IEEE J. Solid State Circuits, 2001)

A 40 nm CMOS analog front end with enhanced audio for HSPA/EDGE multimedia applications. - Xicheng Jiang; Min-Gyu Kim; Felix Cheung; Fang Lin; Hui Zheng; Jianlong Chen; Alex Jianzhong Chen; Darwin Cheung; Khaled Abdelfattah; Seong-Ho Lee; Hanson Hung-Sen Huang; Kishore Kasichainula; et al. (ESSCIRC, 2012)

A 2.7GHz to 7GHz fractional-N LCPLL utilizing multimetal layer SoC technology in 28nm CMOS. - Chang-Hyeon Lee; Lindel Kabalican; Yan Ge; Hendra Kwantono; Greg Unruh; Mark Chambers; Ichiro Fujimori (VLSIC, 2014)

A 2.7 GHz to 7 GHz Fractional-N LC-PLL Utilizing Multi-Metal Layer SoC Technology in 28 nm CMOS. - Chang-Hyeon Lee; Lindel Kabalican; Yan Ge; Hendra Kwantono; Greg Unruh; Mark Chambers; Ichiro Fujimori (IEEE J. Solid State Circuits, 2015)

ecSkin: Low-Cost Fabrication of Epidermal Electrochemical Sensors for Detecting Biomarkers in Sweat. - Sai Nandan Panigrahy; Chang-Hyeon Lee; Vrahant Nagoria; Mohammad Janghorban; Richa Pandey; Aditya Shekhar Nittala (CHI, 2024)