Micro-Sliced Virtual Processors to Hide the Effect of Discontinuous CPU Availability for Consolidated Systems. - Jeongseob Ahn; Chang Hyun Park 001; Jaehyuk Huh 001 (MICRO, 2014)

Efficient Synonym Filtering and Scalable Delayed Translation for Hybrid Virtual Caching. - Chang Hyun Park 001; Taekyung Heo; Jaehyuk Huh 001 (ISCA, 2016)

Virtual Snooping Coherence for Multi-Core Virtualized Systems. - Daehoon Kim; Chang Hyun Park 001; Hwanju Kim; Jaehyuk Huh 001 (IEEE Trans. Parallel Distributed Syst., 2016)

Hybrid TLB Coalescing: Improving TLB Translation Coverage under Diverse Fragmented Memory Allocations. - Chang Hyun Park 001; Taekyung Heo; Jungi Jeong; Jaehyuk Huh 001 (ISCA, 2017)

Accelerating critical OS services in virtualized systems with flexible micro-sliced cores. - Jeongseob Ahn; Chang Hyun Park 001; Taekyung Heo; Jaehyuk Huh 001 (EuroSys, 2018)

Efficient Hardware-Assisted Logging with Asynchronous and Direct-Update for Persistent Memory. - Jungi Jeong; Chang Hyun Park 001; Jaehyuk Huh 001; Seungryoul Maeng (MICRO, 2018)

Morphable DRAM Cache Design for Hybrid Memory Systems. - Sanghoon Cha; Bokyeong Kim; Chang Hyun Park 001; Jaehyuk Huh 001 (ACM Trans. Archit. Code Optim., 2019)

Decoupled Address Translation for Heterogeneous Memory Systems. - Bokyeong Kim; Soojin Hwang; Sanghoon Cha; Chang Hyun Park 001; Jongse Park; Jaehyuk Huh 001 (PACT, 2020)

Perforated Page: Supporting Fragmented Memory Allocation for Large Pages. - Chang Hyun Park 001; Sanghoon Cha; Bokyeong Kim; Youngjin Kwon; David Black-Schaffer; Jaehyuk Huh 001 (ISCA, 2020)

Architecturally-Independent and Time-Based Characterization of SPEC CPU 2017. - Muhammad Hassan 004; Chang Hyun Park 001; David Black-Schaffer (ISPASS, 2020)

Page Tables: Keeping them Flat and Hot (Cached). - Chang Hyun Park 001; Ilias Vougioukas; Andreas Sandberg; David Black-Schaffer (CoRR, 2020)

Reconciling Time Slice Conflicts of Virtual Machines With Dual Time Slice for Clouds. - Taeklim Kim; Chang Hyun Park 001; Jaehyuk Huh 001; Jeongseob Ahn (IEEE Trans. Parallel Distributed Syst., 2020)

A Reusable Characterization of the Memory System Behavior of SPEC2017 and SPEC2006. - Muhammad Hassan 004; Chang Hyun Park 001; David Black-Schaffer (ACM Trans. Archit. Code Optim., 2021)

Every walk's a hit: making page walks single-access cache hits. - Chang Hyun Park 001; Ilias Vougioukas; Andreas Sandberg; David Black-Schaffer (ASPLOS, 2022)

Supporting Dynamic Translation Granularity for Hybrid Memory Systems. - Bokyeong Kim; Soojin Hwang; Sanghoon Cha; Chang Hyun Park 001; Jongse Park; Jaehyuk Huh 001 (ICCD, 2022)

Protean: Resource-efficient Instruction Prefetching. - Muhammad Hassan 004; Chang Hyun Park 001; David Black-Schaffer (MEMSYS, 2023)

Large-scale Graph Processing on Commodity Systems: Understanding and Mitigating the Impact of Swapping. - Alireza Haddadi; David Black-Schaffer; Chang Hyun Park 001 (MEMSYS, 2023)

Exploring the Latency Sensitivity of Cache Replacement Policies. - Ahmed Nematallah; Chang Hyun Park 001; David Black-Schaffer (IEEE Comput. Archit. Lett., 2023)

Accelerating Page Migrations in Operating Systems With Intel DSA. - Jongho Baik; Jonghyeon Kim; Chang Hyun Park 001; Jeongseob Ahn (IEEE Comput. Archit. Lett., 2025)

Pimba: A Processing-in-Memory Acceleration for Post-Transformer Large Language Model Serving. - Wonung Kim; Yubin Lee 002; Yoonsung Kim; Jinwoo Hwang; Seongryong Oh; Jiyong Jung; Aziz Huseynov; Woong Gyu Park; Chang Hyun Park 001; Divya Mahajan 001; Jongse Park (CoRR, 2025)