Single cycle access cache for the misaligned data and instruction prefetch. - Joon-Seo Yim; Hee-Choul Lee; Tae-Hoon Kim; Bong-Il Park; Chang-Jae Park; In-Cheol Park; Chong-Min Kyung (ASP-DAC, 1997)

Verification methodology of compatible microprocessors. - Joon-Seo Yim; Chang-Jae Park; Woo-Seung Yang; Hun-Seung Oh; Hee-Choul Lee; Hoon Choi; Tae-Hoon Kim; Seungjong Lee; Nara Won; Yung-Hei Lee; In-Cheol Park; Chong-Min Kyung (ASP-DAC, 1997)

A C-Based RTL Design Verification Methodology for Complex Microprocessor. - Joon-Seo Yim; Yoon-Ho Hwang; Chang-Jae Park; Hoon Choi; Woo-Seung Yang; Hun-Seung Oh; In-Cheol Park; Chong-Min Kyung (DAC, 1997)

Design Verification of Complex Microprocessors. - Joon-Seo Yim; Chang-Jae Park; In-Cheol Park; Chong-Min Kyung (J. Circuits Syst. Comput., 1997)

An Automatic Interface Insertion Scheme for In-System Verification of Algorithm Models in C. - Chang-Jae Park; Ando Ki; In-Cheol Park; Chong-Min Kyung (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems. - Hao Wang 011; Chang-Jae Park; Gyungsu Byun; Jung Ho Ahn; Nam Sung Kim (HPCA, 2015)