Recursive neural networks with high capacity. - Chang-Jiu Chen; John Y. Cheung (ICNN, 1993)

A pipelined asynchronous 8051 soft-core implemented with Balsa. - Chang-Jiu Chen; Wei-Min Cheng; Ruei-Fu Tsai; Hung-Yue Tsai; Tuan-Chieh Wang (APCCAS, 2008)

Reducing the TLB Context Switching Miss Ratio With Banked and Prefetching Mechanism. - Chang-Jiu Chen; Wei-Min Cheng (J. Inf. Sci. Eng., 2008)

A Quasi-Delay-Insensitive Microprocessor Core Implementation for Microcontrollers. - Chang-Jiu Chen; Wei-Min Cheng; Hung-Yue Tsai; Jen-Chieh Wu (J. Inf. Sci. Eng., 2009)

A low-latency GALS interface implementation. - Yuan-Teng Chang; Wei-Che Chen; Hung-Yue Tsai; Wei-Min Cheng; Chang-Jiu Chen; Fu-Chiung Cheng (APCCAS, 2010)