Calculating frequency-dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method. - Changhao Yan; Wenjian Yu; Zeyi Wang (ASP-DAC, 2006)

A Mixed Boundary Element Method for Extracting Frequency- Inductances of 3D Interconnects. - Changhao Yan; Wenjian Yu; Zeyi Wang (ISQED, 2006)

Efficient techniques for 3-D impedance extraction using mixed boundary element method. - Fang Gong; Wenjian Yu; Zeyi Wang; Zhiping Yu; Changhao Yan (ASP-DAC, 2008)

Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays. - Yi Wang; Wai-Shing Luk; Xuan Zeng 001; Jun Tao 001; Changhao Yan; Jiarong Tong; Wei Cai 003; Jia Ni (DAC, 2008)

Characterizing Intra-Die Spatial Correlation Using Spectral Density Method. - Qiang Fu; Wai-Shing Luk; Jun Tao 001; Changhao Yan; Xuan Zeng 001 (ISQED, 2008)

Adaptive Stochastic Collocation Method (ASCM) for Parameterized Statistical Timing Analysis with Quadratic Delay Model. - Yi Wang; Xuan Zeng 001; Jun Tao 001; Hengliang Zhu; Xu Luo; Changhao Yan; Wei Cai 003 (ISQED, 2008)

Provably good and practically efficient algorithms for CMP dummy fill. - Chunyang Feng; Hai Zhou 001; Changhao Yan; Jun Tao 001; Xuan Zeng 001 (DAC, 2009)

Characterizing Intra-Die Spatial Correlation Using Spectral Density Fitting Method. - Qiang Fu; Wai-Shing Luk; Jun Tao 001; Changhao Yan; Xuan Zeng 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

An efficient algorithm for multi-domain clock skew scheduling. - Yanling Zhi; Wai-Shing Luk; Hai Zhou 001; Changhao Yan; Hengliang Zhu; Xuan Zeng 001 (DATE, 2011)

A new method for multiparameter robust stability distribution analysis of linear analog circuits. - Changhao Yan; Sheng-Guo Wang; Xuan Zeng 001 (ICCAD, 2011)

Efficient Approximation Algorithms for Chemical Mechanical Polishing Dummy Fill. - Chunyang Feng; Hai Zhou 001; Changhao Yan; Jun Tao 001; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Yield-Driven Clock Skew Scheduling for Arbitrary Distributions of Critical Path Delays. - Yanling Zhi; Wai-Shing Luk; Yi Wang; Changhao Yan; Xuan Zeng 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012)

Layout decomposition with pairwise coloring for multiple patterning lithography. - Ye Zhang 011; Wai-Shing Luk; Hai Zhou 001; Changhao Yan; Xuan Zeng 001 (ICCAD, 2013)

Post-routing layer assignment for double patterning with timing critical paths consideration. - Jian Sun 005; Yinghai Lu; Hai Zhou 001; Changhao Yan; Xuan Zeng 001 (Integr., 2013)

An efficient method for gradient-aware dummy fill synthesis. - Peng Wu; Hai Zhou 001; Changhao Yan; Jun Tao 001; Xuan Zeng 001 (Integr., 2013)

A Parallel Method for Solving Laplace Equations with Dirichlet Data Using Local Boundary Integral Equations and Random Walks. - Changhao Yan; Wei Cai 003; Xuan Zeng 001 (SIAM J. Sci. Comput., 2013)

Layout decomposition co-optimization for hybrid e-beam and multiple patterning lithography. - Yunfeng Yang; Wai-Shing Luk; Hai Zhou 001; Changhao Yan; Xuan Zeng 001; Dian Zhou (ASP-DAC, 2015)

Rapid estimation of the probability of SRAM failure via adaptive multi-level sliding-window statistical method. - Zhenyu Wu; Changhao Yan; Xuan Zeng 001; Sheng-Guo Wang (Integr., 2015)

Multi-parameter clock skew scheduling. - Xingbao Zhou; Wai-Shing Luk; Hai Zhou 001; Fan Yang 001; Changhao Yan; Xuan Zeng 001 (Integr., 2015)

Layout Decomposition with Pairwise Coloring and Adaptive Multi-Start for Triple Patterning Lithography. - Ye Zhang 011; Wai-Shing Luk; Yunfeng Yang; Hai Zhou 001; Changhao Yan; David Z. Pan; Xuan Zeng 001 (ACM Trans. Design Autom. Electr. Syst., 2015)

Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data. - Bo Peng; Fan Yang 001; Changhao Yan; Xuan Zeng 001; Dian Zhou (DATE, 2016)

A novel unified dummy fill insertion framework with SQP-based optimization method. - Yudong Tao; Changhao Yan; Yibo Lin; Sheng-Guo Wang; David Z. Pan; Xuan Zeng 001 (ICCAD, 2016)

Layout Decomposition Co-Optimization for Hybrid E-Beam and Multiple Patterning Lithography. - Yunfeng Yang; Wai-Shing Luk; David Z. Pan; Hai Zhou 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

An efficient algorithm for stencil planning and optimization in E-beam lithography. - Jiabei Ge; Changhao Yan; Hai Zhou 001; Dian Zhou; Xuan Zeng 001 (ASP-DAC, 2017)

Network flow based cut redistribution and insertion for advanced 1D layout design. - Ye Zhang 011; Wai-Shing Luk; Fan Yang 001; Changhao Yan; Hai Zhou 001; Dian Zhou; Xuan Zeng 001 (ASP-DAC, 2017)

Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits. - Mengshuo Wang; Fan Yang 001; Changhao Yan; Xuan Zeng 001; Xiangdong Hu (DAC, 2017)

Subgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits. - Wenlong Lv; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (DATE, 2017)

Impact of circuit-level non-idealities on vision-based autonomous driving systems. - Handi Yu; Changhao Yan; Xuan Zeng 001; Xin Li 001 (ICCAD, 2017)

Layout decomposition for hybrid E-beam and DSA double patterning lithography. - Yunfeng Yang; Fan Yang 001; Wai-Shing Luk; Changhao Yan; Xuan Zeng 001; Xiangdong Hu (ISCAS, 2017)

A Novel N-Retry Transactional Memory Model for Multi-Thread Programming. - Kun Lu; Changhao Yan; Hai Zhou 001; Dian Zhou; Xuan Zeng 001 (ISPA/IUCC, 2017)

An Effective Layout Decomposition Method for DSA with Multiple Patterning in Contact-Hole Generation. - Yunfeng Yang; Wai-Shing Luk; Hai Zhou 001; David Z. Pan; Dian Zhou; Changhao Yan; Xuan Zeng 001 (ACM Trans. Design Autom. Electr. Syst., 2017)

High-Dimensional and Multiple-Failure-Region Importance Sampling for SRAM Yield Analysis. - Mengshuo Wang; Changhao Yan; Xin Li 001; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Multi-objective bayesian optimization for analog/RF circuit synthesis. - Wenlong Lyu; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (DAC, 2018)

A general graph based pessimism reduction framework for design optimization of timing closure. - Fulin Peng; Changhao Yan; Chunyang Feng; Jianquan Zheng; Sheng-Guo Wang; Dian Zhou; Xuan Zeng 001 (DAC, 2018)

An efficient Bayesian yield estimation method for high dimensional and high sigma SRAM circuits. - Jinyuan Zhai; Changhao Yan; Sheng-Guo Wang; Dian Zhou (DAC, 2018)

Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design. - Wenlong Lyu; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (ICML, 2018)

Efficient Yield Optimization for Analog and SRAM Circuits via Gaussian Process Regression and Adaptive Yield Estimation. - Mengshuo Wang; Wenlong Lv; Fan Yang 001; Changhao Yan; Wei Cai 003; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Smart-MSP: A Self-Adaptive Multiple Starting Point Optimization Approach for Analog Circuit Synthesis. - Yishi Yang; Hengliang Zhu; Zhaori Bi; Changhao Yan; Dian Zhou; Yangfeng Su; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits. - Wenlong Lyu; Pan Xue; Fan Yang 001; Changhao Yan; Zhiliang Hong; Xuan Zeng 001; Dian Zhou (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

An Efficient Non-Gaussian Sampling Method for High Sigma SRAM Yield Analysis. - Jinyuan Zhai; Changhao Yan; Sheng-Guo Wang; Dian Zhou; Hai Zhou 001; Xuan Zeng 001 (ACM Trans. Design Autom. Electr. Syst., 2018)

An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis. - Shuhan Zhang; Wenlong Lyu; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001; Xiangdong Hu (DAC, 2019)

An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel. - Xin Wei; Changhao Yan; Hai Zhou 001; Dian Zhou; Xuan Zeng 001 (DATE, 2019)

Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network. - Shuhan Zhang; Wenlong Lyu; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (DATE, 2019)

An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits. - Xiaodong Wang; Tianchen Gu; Changhao Yan; Xiulong Wu; Fan Yang 001; Sheng-Guo Wang; Dian Zhou; Xuan Zeng 001 (DAC, 2020)

An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling. - Biao He; Shuhan Zhang; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (DATE, 2020)

A Fast Aging-aware Static Timing Analysis Prediction Frame of Digital Integrated Circuits. - Jiahui Hu; Changhao Yan; Chao Guo; Ronggui Jiang; Dian Zhou; Xuan Zeng 001 (ASICON, 2021)

Efficient High-Level Synthesis of Approximate Computing Circuits via Multi-fidelity Modeling. - Yingqi Li; Fan Yang 001; Changhao Yan; Xuan Zeng 001 (ASICON, 2021)

High-Dimensional Bayesian Optimization for Automated Analog Circuit Design via Add-Graph Structure. - Yan Wang; Changhao Yan; Dian Zhou; Xuan Zeng 001 (ASICON, 2021)

A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization. - Jiangli Huang; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (ASP-DAC, 2021)

NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis. - Junzhe Cai; Changhao Yan; Yuzhe Ma; Bei Yu 001; Dian Zhou; Xuan Zeng 001 (DAC, 2021)

Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization. - Jialin Lu; Liangbo Lei; Fan Yang 001; Changhao Yan; Xuan Zeng 001 (DAC, 2021)

An Efficient Yield Estimation Method for Layouts of High Dimensional and High Sigma SRAM Arrays. - Yue Shen; Changhao Yan; Sheng-Guo Wang; Dian Zhou; Xuan Zeng 001 (DATE, 2021)

Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process. - Jiangli Huang; Shuhan Zhang; Cong Tao; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (ISCAS, 2021)

An Efficient Batch Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-objective Acquisition Ensemble. - Shuhan Zhang; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (CoRR, 2021)

A Novel and Unified Full-Chip CMP Model Aware Dummy Fill Insertion Framework With SQP-Based Optimization Method. - Junzhe Cai; Changhao Yan; Yudong Tao; Yibo Lin; Sheng-Guo Wang; David Z. Pan; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench. - Jingyao Zhao; Changhao Yan; Zhaori Bi; Fan Yang 001; Xuan Zeng 001; Dian Zhou (ASP-DAC, 2022)

An efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling. - Xiaodong Wang; Changhao Yan; Fan Yang 001; Dian Zhou; Xuan Zeng 001 (DAC, 2022)

A High-Precision Stochastic Solver for Steady-State Thermal Analysis with Fourier Heat Transfer Robin Boundary Conditions. - Longlong Yang; Cuiyang Ding; Changhao Yan; Dian Zhou; Xuan Zeng 001 (ICCAD, 2022)

A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion. - Xu Fu; Changhao Yan; Zhaori Bi; Fan Yang 001; Dian Zhou; Xuan Zeng 001 (ISCAS, 2022)

SAT-based Scheduling Algorithm for High-level Synthesis Considering Resource Sharing. - Hao Jiang; Fan Yang 001; Changhao Yan; Xuan Zeng 001 (ISCAS, 2022)

LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces. - Shuhan Zhang; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (MLCAD, 2022)

Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique. - Xiaodong Wang; Changhao Yan; Yuzhe Ma; Bei Yu 001; Fan Yang 001; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

An Efficient Batch-Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multiobjective Acquisition Ensemble. - Shuhan Zhang; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

A Parallel Iterative Probabilistic Method for Mixed Problems of Laplace Equations with the Feynman-Kac Formula of Killed Brownian Motions. - Cuiyang Ding; Changhao Yan; Xuan Zeng 001; Wei Cai 003 (SIAM J. Sci. Comput., 2022)

cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis. - Aidong Zhao; Xianan Wang; Zixiao Lin; Zhaori Bi; Xudong Li; Changhao Yan; Fan Yang 001; Li Shang; Dian Zhou; Xuan Zeng 001 (DAC, 2023)

An Analog Circuit Building Block Generator via Nested Multi-Fidelity Modeling. - Jiangli Huang; Chuyu Wang; Yuyang Yan; Cong Tao; Fan Yang 001; Changhao Yan; Wenchuang Walter Hu; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A Batched Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-Fidelity Modeling. - Biao He; Shuhan Zhang; Yifan Wang; Tianning Gao; Fan Yang 001; Changhao Yan; Dian Zhou; Zhaori Bi; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

A path integral Monte Carlo (PIMC) method based on Feynman-Kac formula for electrical impedance tomography. - Cuiyang Ding; Yijing Zhou; Wei Cai 003; Xuan Zeng 001; Changhao Yan (J. Comput. Phys., 2023)

A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper). - Ruiyu Lyu; Yuan Meng; Aidong Zhao; Zhaori Bi; Keren Zhu 001; Fan Yang 001; Changhao Yan; Dian Zhou; Xuan Zeng 001 (ASPDAC, 2024)

Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing. - Xuyang Zhao; Zhaori Bi; Changhao Yan; Fan Yang 001; Ye Lu 005; Dian Zhou; Xuan Zeng 001 (ASPDAC, 2024)

HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing. - Tianchen Gu; Ruiyu Lyu; Zhaori Bi; Changhao Yan; Fan Yang 001; Dian Zhou; Tao Cui; Xin Liu 001; Zaikun Zhang; Xuan Zeng 001 (DAC, 2024)

EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration. - Handa Sun; Zhaori Bi; Wenning Jiang; Ye Lu 005; Changhao Yan; Fan Yang 001; Wenchuang Hu; Sheng-Guo Wang; Dian Zhou; Xuan Zeng 001 (DAC, 2024)

tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling. - Tianchen Gu; Jiaqi Wang; Zhaori Bi; Changhao Yan; Fan Yang 001; Yajie Qin; Tao Cui; Xuan Zeng 001 (DATE, 2024)

Circuits Physics Constrained Predictor of Static IR Drop with Limited Data. - Yuan Meng; Ruiyu Lyu; Zhaori Bi; Changhao Yan; Fan Yang 001; Wenchuang Hu; Dian Zhou; Xuan Zeng 001 (DATE, 2024)

AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis. - Jintao Li; Haochang Zhi; Ruiyu Lyu; Wangzhen Li; Zhaori Bi; Keren Zhu 001; Yanhan Zeng; Weiwei Shan; Changhao Yan; Fan Yang 001; Yun Li 002; Xuan Zeng 001 (ICCAD, 2024)

Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis. - Ruiyu Lyu; Aidong Zhao; Yuan Meng; Keren Zhu 001; Zhaori Bi; Changhao Yan; Fan Yang 001; Dian Zhou; Xuan Zeng 001 (ICCAD, 2024)

Exploring High-dimensional Search Space via Voronoi Graph Traversing. - Aidong Zhao; Xuyang Zhao; Tianchen Gu; Zhaori Bi; Xinwei Sun 001; Changhao Yan; Fan Yang 001; Dian Zhou; Xuan Zeng 001 (UAI, 2024)

pNeurFill: Enhanced Neural Network Model-Based Dummy Filling Synthesis With Perimeter Adjustment. - Zhaoting Chen; Junzhe Cai; Changhao Yan; Zhaori Bi; Yuzhe Ma; Bei Yu 001; Wenchuang Walter Hu; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

BBGP-sDFO: Batch Bayesian and Gaussian Process Enhanced Subspace Derivative Free Optimization for High-Dimensional Analog Circuit Synthesis. - Tianchen Gu; Wangzhen Li; Aidong Zhao; Zhaori Bi; Xudong Li; Fan Yang 001; Changhao Yan; Wenchuang Walter Hu; Dian Zhou; Tao Cui; Xin Liu 001; Zaikun Zhang; et al. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

D3PBO: Dynamic Domain Decomposition-based Parallel Bayesian Optimization for Large-scale Analog Circuit Sizing. - Aidong Zhao; Tianchen Gu; Zhaori Bi; Fan Yang 001; Changhao Yan; Xuan Zeng 001; Zixiao Lin; Wenchuang Walter Hu; Dian Zhou (ACM Trans. Design Autom. Electr. Syst., 2024)

ROI-HIT: Region of Interest-Driven High-Dimensional Microarchitecture Design Space Exploration. - Xuyang Zhao; Tianning Gao; Aidong Zhao; Zhaori Bi; Changhao Yan; Fan Yang 001; Sheng-Guo Wang; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

INTO-OA: Interpretable Topology Optimization for Operational Amplifiers. - Jinyi Shen; Fan Yang 001; Li Shang; Zhaori Bi; Changhao Yan; Dian Zhou; Xuan Zeng 001 (DATE, 2025)

ATOM: An Automatic Topology Synthesis Framework for Operational Amplifiers. - Jinyi Shen; Fan Yang 001; Li Shang; Changhao Yan; Zhaori Bi; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

VTSMOC: An Efficient Voronoi Tree Search Boosted Multiobjective Bayesian Optimization With Constraints for High-Dimensional Analog Circuit Synthesis. - Aidong Zhao; Ruiyu Lyu; Xuyang Zhao; Zhaori Bi; Fan Yang 001; Changhao Yan; Dian Zhou; Yangfeng Su; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

pPIRW: An Efficient and Accurate Precalculation Path Integral Random Walk Solver for Steady-State Thermal Simulation With Robin Boundary Conditions. - Zhixuan Dong; Longlong Yang; Cuiyang Ding; Changhao Yan; Zhaori Bi; Sheng-Guo Wang; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

APPLE-DSE: Asynchronous Parallel Pareto Set Learning for Microarchitecture Design Space Exploration. - Xuyang Zhao; Tianning Gao; Zheng Wu; Zhaori Bi; Changhao Yan; Fan Yang 001; Sheng-Guo Wang; Dian Zhou; Xuan Zeng 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)