A 50 Mb/s Full HBC TRX with Adaptive DFE and Variable-Interval 3x Oversampling CDR in 28nm CMOS Technology for A 75 cm Body Channel Moving at 0.75 Cycle/sec. - Jaehyun Ko 001; Iksu Jang; Chanho Kim; Jihoon Park; Changjae Moon; Sooeun Lee; Byungsub Kim (ESSCIRC, 2022)

A Cost-efficient FPGA-based Embedded System for Biosensor Platform. - Iksu Jang; Jaeyoung Seo; Changjae Moon; Byungsub Kim (ISOCC, 2022)

A 20 Gb/s/pin 1.18pJ/b 1149µm2Single-Ended Inverter-based 4-tap Addition-Only Feed-Forward Equalization Transmitter with Improved Robustness to Coefficient Errors in 28nm CMOS. - Changjae Moon; Jaeyoung Seo; Myungguk Lee; Iksu Jang; Byungsub Kim (ISSCC, 2022)

A 20-Gb/s/pin 0.0024-mm2 Single-Ended DECS TRX with CDR-less Self-Slicing/Auto-Deserialization to Improve Tolerance on Duty Cycle Error and RX Supply Noise for DCC/CDR-less Short-Reach Memory Interfaces. - Jaeyoung Seo; Sooeun Lee; Myungguk Lee; Changjae Moon; Byungsub Kim (ISSCC, 2022)

A 20-Gb/s/Pin Compact Single-Ended DCC-Less DECS Transceiver With CDR-Less RX Front-End for On-Chip Links. - Jaeyoung Seo; Sooeun Lee; Myungguk Lee; Changjae Moon; Byungsub Kim (IEEE J. Solid State Circuits, 2023)

Compact Single-Ended Transceivers Demonstrating Flexible Generation of 1/N-Rate Receiver Front-Ends for Short-Reach Links. - Myungguk Lee; Jaeik Cho; Junung Choi; Won Joon Choi; Jiyun Lee; Iksu Jang; Changjae Moon; Gain Kim; Byungsub Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A Single-Ended Inverter-Based Addition-Only Feed-Forward Equalization Transmitter. - Changjae Moon; Jaeyoung Seo; Myungguk Lee; Iksu Jang; Byungsub Kim (IEEE J. Solid State Circuits, 2024)

3×16 Gb/s Compact Single-Ended PAM4 Transmitters With Inverter-Based Crosstalk Compensation for Memory Interfaces. - Changjae Moon; Iksu Jang; Sungmin Lim; Yaejoon Huh; Byungsub Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2024)