Numerical investigation on buried gate and drift region with P-type blocks in trench SOI LDMOS. - Yue Hu 005; Tianci Wang; Changmiao Wu; Jing Wang; Yuhua Cheng; Wen-Sheng Zhao; Gaofeng Wang (Microelectron. J., 2025)

Three-dimensional design of SOI LDMOS with high-k film trench and L-shaped gate. - Yue Hu 005; Tianci Wang; Changmiao Wu; Jing Wang; Yuhua Cheng; Wen-Sheng Zhao; Gaofeng Wang (Microelectron. J., 2025)