A 6-bit drift-resilient readout scheme for multi-level Phase-Change Memory. - Aravinthan Athmanathan; Milos Stanisavljevic; Junho Cheon; Seokjoon Kang; Changyong Ahn; Junghyuk Yoon; Min-Chul Shin; Taekseung Kim; Nikolaos Papandreou; Haris Pozidis; Evangelos Eleftheriou (A-SSCC, 2014)

Auto-Scaling Overdrive Method Using Adaptive Charge Amplification for PRAM Write Performance Enhancement. - Sukhwan Choi; Hyunsik Kim; Seungchul Jung; Si-Duk Sung; Young-sub Yuk; Hyuck-Sang Yim; Yoonjae Shin; Junho Cheon; Changyong Ahn; Taekseung Kim; Yongki Brave Kim; Gyu-Hyeong Cho (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Non-resistance metric based read scheme for multi-level PCRAM in 25 nm technology. - Junho Cheon; Insoo Lee; Changyong Ahn; Milos Stanisavljevic; Aravinthan Athmanathan; Nikolaos Papandreou; Haris Pozidis; Evangelos Eleftheriou; Min-Chul Shin; Taekseung Kim; Jong-Ho Kang; Jun Hyun Chun (CICC, 2015)

A Quasi-Digital Ultra-Fast Capacitor-Less Low-Dropout Regulator Based on Comparator Control for x8 Current Spike of PCRAM Systems. - Sung-Won Choi; Yeunhee Huh; Sang-Hui Park; Kye-Seok Yoon; Jun-Suk Bang; Se-Un Shin; Yong-Min Ju; Yu-Jin Yang; Junghyuk Yoon; Changyong Ahn; Taekseung Kim; Sung-Wan Hong; et al. (VLSI Circuits, 2018)