Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic. - Channakeshav; Kuan Zhou; Russell P. Kraft; John F. McDonald 001 (Evolvable Hardware, 2002)

Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques. - Channakeshav; Kuan Zhou; Jong-Ru Guo; Chao You; Bryan S. Goda; Russell P. Kraft; John F. McDonald 001 (FPL, 2002)

Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes. - Kuan Zhou; Channakeshav; Michael Chu; Jong-Ru Guo; S.-C. Liu; Russell P. Kraft; Chao You; John F. McDonald 001 (FPT, 2002)

A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. - Kuan Zhou; Michael Chu; Chao You; Jong-Ru Guo; Channakeshav; John Mayega; John F. McDonald 001; Russell P. Kraft; Bryan S. Goda (FPGA, 2003)