A Radiation-Hardened Serial Peripheral Interface with an ECC-Protected SRAM in a 65nm CMOS Technology. - Ming-Hao Chang; Chansyun Yang; Yu-Ju Chuang; Herming Chiueh (APCCAS, 2024)

Radiation-hardened Configuration Registers with SPI Interface Protocol in a 65nm CMOS Technology. - Tai-Lai Liu; Chansyun Yang; Yu-Ju Chuang; Herming Chiueh (APCCAS, 2024)