On-the-fly dynamic voltage scaling (DVS) in 65nm energy-efficient power management with frequency-based control (FBC) for SoC system. - Yu-Huei Lee; Chao-Chang Chiu; Ke-Horng Chen; Ying-Hsi Lin; Chen-Chih Huang (A-SSCC, 2011)

A single-inductor dual-output (SIDO) based power management with adaptive bus voltage modulation and zero cross-regulation in 40nm CMOS. - Yu-Huei Lee; Tzu-Chi Huang; Kuan-Yu Chu; Chao-Chang Chiu; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Ching-Yuan Yeh; Chen-Chih Huang; Chao-Cheng Lee (ESSCIRC, 2012)

A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance. - Yu-Huei Lee; Shen-Yu Peng; Alex Chun-Hsien Wu; Chao-Chang Chiu; Yao-Yi Yang; Ming-Hsin Huang; Ke-Horng Chen; Ying-Hsi Lin; Shih-Wei Wang; Ching-Yuan Yeh; Chen-Chih Huang; Chao-Cheng Lee (VLSIC, 2012)

A Near-Optimum Dynamic Voltage Scaling (DVS) in 65-nm Energy-Efficient Power Management With Frequency-Based Control (FBC) for SoC System. - Yu-Huei Lee; Chao-Chang Chiu; Shen-Yu Peng; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Chen-Chih Huang; Tsung-Yen Tsai (IEEE J. Solid State Circuits, 2012)

Authentic mode-toggled detector with fast transient response under wide load range buck-boost converter. - Moris Lin; Yung-Sheng Huang; Andreas Ehrhart; Yu-Huei Lee; Chao-Chang Chiu; Bernhard Wicht; Ke-Horng Chen (ISCAS, 2013)

A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement. - Yu-Huei Lee; Shen-Yu Peng; Chao-Chang Chiu; Alex Chun-Hsien Wu; Ke-Horng Chen; Ying-Hsi Lin; Shih-Wei Wang; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee (IEEE J. Solid State Circuits, 2013)

Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings. - Shen-Yu Peng; Tzu-Chi Huang; Yu-Huei Lee; Chao-Chang Chiu; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Tsung-Yen Tsai; Chen-Chih Huang; Long-Der Chen; Cheng-Chen Yang (IEEE J. Solid State Circuits, 2013)

A compact power management for next generation intensive care unit with 91% conversion efficiency. - Chao-Chang Chiu; Hsiang-An Yang; Yi-Ping Su; Chih-Wei Chang; Che-Hao Meng; Ke-Horng Chen (ICCE-TW, 2014)

Self-Calibrated Knee Voltage Detector With 99.65% High Accuracy for AC Charger System in 0.5 µm 500 V UHV Process. - Chao-Chang Chiu; Moris Lin; Chih-Wei Chang; Che-Hao Meng; Hsiang-An Yang; Ke-Horng Chen (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs. - Hsiang-An Yang; Chao-Chang Chiu; Shin-Chi Lai; Jui-Lung Chen; Chih-Wei Chang; Che-Hao Meng; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai; et al. (ESSCIRC, 2015)

A 0.6 V Resistance-Locked Loop Embedded Digital Low Dropout Regulator in 40 nm CMOS With 80.5% Power Supply Rejection Improvement. - Chao-Chang Chiu; Po-Hsien Huang; Moris Lin; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chao-Cheng Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A Buck Power Factor Correction Converter with Predictive Quadratic Sinusoidal Current Modulation and Line Voltage Reconstruction. - Shang-Hsien Yang; Che-Hao Meng; Chao-Chang Chiu; Chih-Wei Chang; Ke-Horng Chen; Ying-Hsi Lin; Shian-Ru Lin; Tsung-Yen Tsai (IEEE Trans. Ind. Electron., 2016)

High Accuracy Knee Voltage Detection for Primary-Side Control in Flyback Battery Charger. - Shang-Hsien Yang; Tsung-Hsun Tsai; Hsin Chen; Chao-Chang Chiu; Ke-Horng Chen; Ying-Hsi Lin; Jian-Ru Lin; Tsung-Yen Tsai (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

94% power-recycle and near-zero driving-dead-zone N-type low-dropout regulator with 20mV undershoot at short-period load transient of flash memory in smart phone. - Wei-Chung Chen; Tzu-Chi Huang; Chao-Chang Chiu; Chih-Wei Chang; Kuo-Chun Hsu (ISSCC, 2018)