Multiband UWB transceivers. - Behzad Razavi; Turgut Aytur; Christopher Lam 002; Fei-Ran Yang 004; Ran-Hong Yan 001; Han-Chang Kang; Cheng-Chung Hsu; Chao-Cheng Lee (CICC, 2005)

A UWB CMOS transceiver. - Behzad Razavi; Turgut Aytur; Christopher Lam 002; Fei-Ran Yang 004; Kuang-Yu (Jason) Li; Ran-Hong (Ran) Yan; Han-Chang Kang; Cheng-Chung Hsu; Chao-Cheng Lee (IEEE J. Solid State Circuits, 2005)

A Fully Integrated UWB PHY in 0.13µm CMOS. - Turgut Aytur; Han-Chang Kang; Ravishankar H. Mahadevappa; Mustafa Altintas; Stephan ten Brink; Thanh Diep; Cheng-Chung Hsu; Feng Shi; Fei-Ran Yang 004; Chao-Cheng Lee; Ran-Hong Yan 001; Behzad Razavi (ISSCC, 2006)

An Analytical Approach for Quantifying Clock Jitter Effects in Continuous-Time Sigma-Delta Modulators. - Yuan-Shuo Chang; Chia-Liang Lin; Wen-Shan Wang; Chao-Cheng Lee; Chih-Yung Shih (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

A 10b 200MS/s pipelined folding ADC with offset calibration. - Cheng-Chung Hsu; Chen-Chih Huang; Ying-Hsi Lin; Chao-Cheng Lee (ESSCIRC, 2007)

An 11b 800MS/s Time-Interleaved ADC with Digital Background Calibration. - Cheng-Chung Hsu; Fong-Ching Huang; Chih-Yung Shih; Chen-Chih Huang; Ying-Hsi Lin; Chao-Cheng Lee; Behzad Razavi (ISSCC, 2007)

A Low-Power Fullband 802.11a/b/g WLAN Transceiver With On-Chip PA. - Tzung-Ming Chen; Yung-Ming Chiu; Chun-Cheng Wang; Ka-Un Chan; Ying-Hsi Lin; Ming-Chong Huang; Chao-Hua Lu; Wen-Shan Wang; Che-Sheng Hu; Chao-Cheng Lee; Jiun-Zen Huang; Bin-I Chang; et al. (IEEE J. Solid State Circuits, 2007)

A 2.4-GHz +25dBm P-1dB linear power amplifier with dynamic bias control in a 65-nm CMOS process. - Po-Chih Wang; Kai-Yi Huang; Yu-Fu Kuo; Ming-Chong Huang; Chao-Hua Lu; Tzung-Ming Chen; Chia-Jun Chang; Ka-Un Chan; Ta-Hsun Yeh; Wen-Shan Wang; Ying-Hsi Lin; Chao-Cheng Lee (ESSCIRC, 2008)

A Quantization Error Minimization Method Using DDS-DAC for Wideband Fractional-N Frequency Synthesizer. - Yi-Da Wu; Chang-Ming Lai; Chao-Cheng Lee; Po-Chiun Huang (IEEE J. Solid State Circuits, 2010)

A single-inductor dual-output (SIDO) based power management with adaptive bus voltage modulation and zero cross-regulation in 40nm CMOS. - Yu-Huei Lee; Tzu-Chi Huang; Kuan-Yu Chu; Chao-Chang Chiu; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Ching-Yuan Yeh; Chen-Chih Huang; Chao-Cheng Lee (ESSCIRC, 2012)

Inductorless and electrolytic capacitorless pseudo-sine current controller in LED lighting system with 1.1W/2.2W power reduction. - Yi-Ping Su; Shao-Wei Chiu; Chun-Chieh Kuo; Yu-Huei Lee; Ke-Horng Chen; Ying-Hsi Lin; Chen-Chih Huang; Chao-Cheng Lee; Yu-Wen Chen (ESSCIRC, 2012)

A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance. - Yu-Huei Lee; Shen-Yu Peng; Alex Chun-Hsien Wu; Chao-Chang Chiu; Yao-Yi Yang; Ming-Hsin Huang; Ke-Horng Chen; Ying-Hsi Lin; Shih-Wei Wang; Ching-Yuan Yeh; Chen-Chih Huang; Chao-Cheng Lee (VLSIC, 2012)

An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter. - Wen-Shen Chou; Tzu-Chi Huang; Yu-Huei Lee; Yao-Yi Yang; Yi-Ping Su; Ke-Horng Chen; Chen-Chih Huang; Ying-Hsi Lin; Chao-Cheng Lee; Kuei-Ann Wen; Ying-Chih Hsu; Yung-Chow Peng; et al. (IEEE J. Solid State Circuits, 2012)

A Near-Optimum Dynamic Voltage Scaling (DVS) in 65-nm Energy-Efficient Power Management With Frequency-Based Control (FBC) for SoC System. - Yu-Huei Lee; Chao-Chang Chiu; Shen-Yu Peng; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Chen-Chih Huang; Tsung-Yen Tsai (IEEE J. Solid State Circuits, 2012)

A 10Gbps, 1.24pJ/bit, burst-mode clock and data recovery with jitter suppression. - Ming-Chiuan Su; Wei-Zen Chen; Pei-Si Wu; Yu-Hsian Chen; Chao-Cheng Lee; Shyh-Jye Jou (CICC, 2013)

A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement. - Yu-Huei Lee; Shen-Yu Peng; Chao-Chang Chiu; Alex Chun-Hsien Wu; Ke-Horng Chen; Ying-Hsi Lin; Shih-Wei Wang; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee (IEEE J. Solid State Circuits, 2013)

Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings. - Shen-Yu Peng; Tzu-Chi Huang; Yu-Huei Lee; Chao-Chang Chiu; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Tsung-Yen Tsai; Chen-Chih Huang; Long-Der Chen; Cheng-Chen Yang (IEEE J. Solid State Circuits, 2013)

A 2.5W tablet speaker delivering 3.2W pseudo high power by psychoacoustic model based adaptive power management system. - Shin-Hao Chen; Shen-Yu Peng; Ke-Horng Chen; Shin-Chi Lai; Sheng Kang; Kevin Cheng 002; Ying-Hsi Lin; Chen-Chih Huang; Chao-Cheng Lee (A-SSCC, 2014)

CCM/GM relative skip energy control in single-inductor multiple-output DC-DC converter for wearable device power solution. - Yi-Ping Su; Chiun-He Lin; Te-Fu Yang; Ru-Yu Huang; Wei-Chung Chen; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chao-Cheng Lee (A-SSCC, 2014)

A 20MS/s buck/boost supply modulator for envelope tracking applications with direct digital interface. - Shang-Hsien Yang; Chin-Long Wey; Ke-Horng Chen; Ying-Hsi Lin; Jing-Jia Chen; Tsung-Yen Tsai; Chao-Cheng Lee (A-SSCC, 2014)

Anti-ESL/ESR variation robust constant-on-time control for DC-DC buck converter in 28nm CMOS technology. - Hsin-Chieh Chen; Wei-Chung Chen; Ying-Wei Chou; Meng-Wei Chien; Chin-Long Wey; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chao-Cheng Lee (CICC, 2014)

Single inductor quad output switching converter with priority-scheduled program for fast transient and unlimited-load range in 40nm CMOS technology. - Wei-Chung Chen; Tzu-Chi Huang; Tsu-Wei Tsai; Ruei-Hong Peng; Kuei-Liang Lin; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Li-Ren Huang; Chao-Jen Huang; et al. (ESSCIRC, 2014)

A pseudo fixed switching frequency 2kHz/A in optimum on-time control buck converter with predicting correction technique for EMI solution. - Wei-Chung Chen; Kuei-Liang Lin; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin-Yu Luo; Shih-Ming Wang; et al. (ISCAS, 2014)

A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. - Ying-Wei Chou; Meng-Wei Chien; Shin-Chieh Chen; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin-Yu Luo; et al. (ISCAS, 2014)

A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. - Shang-Hsien Yang; Yuan-Han Yang; Ke-Horng Chen; Chung-Chih Hung; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; et al. (ISCAS, 2014)

±3% voltage variation and 95% efficiency 28nm constant on-time controlled step-down switching regulator directly supplying to Wi-Fi systems. - Wei-Chung Chen; Yung-Sheng Huang; Meng-Wei Chien; Ying-Wei Chou; Hsin-Chieh Chen; Yi-Ping Su; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee (VLSIC, 2014)

A direct AC-DC and DC-DC cross-source energy harvesting circuit with analog iterating-based MPPT technique with 72.5% conversion efficiency and 94.6% tracking efficiency. - Tzu-Chi Huang; Ming-Jhe Du; Kuei-Liang Lin; Shao Siang Ng; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Jui-Lung Chen; Hung-Wei Chen (VLSIC, 2014)

200nA low quiescent current deep-standby mode in 28nm DC-DC buck converter for active implantable medical devices. - Li-Cheng Chu; Te-Fu Yang; Ru-Yu Huang; Yi-Ping Su; Chiun-He Lin; Chin-Long Wey; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai (A-SSCC, 2015)

99.4% peak audio signal recovery rate and ultra-low 0.32dB matching error with 10Hz high resolution filter fitting wearable aided speech compensation system. - Yen-Ting Lin; Shin-Chi Lai; Shin-Hao Chen; Shen-Yu Peng; Ke-Horng Chen; Sheng Kang; Kevin Cheng 002; Ying-Hsi Lin; Chen-Chih Huang; Chao-Cheng Lee (A-SSCC, 2015)

Pseudo AC current synthesizer and DC offset-corrected technique in constant-on-time control buck converter for werable electronics. - Jui-Che Su; Wei-Chung Chen; Wei-Tin Lin; Ying-Wei Chou; Meng-Wei Chien; Chin-Long Wey; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Shian-Ru Lin; Tsung-Yen Tsai (A-SSCC, 2015)

Suppressing output overshoot voltage technique with 47.1mW/μs power-recycling rate and 93% peak efficiency DC-DC converter for multi-core processors. - Meng-Wei Chien; Wen-Hau Yang; Ying-Wei Chou; Hsin-Chieh Chen; Wei-Chung Chen; Ke-Horng Chen; Chin-Long Wey; Shin-Chi Lai; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai; et al. (ESSCIRC, 2015)

120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs. - Hsiang-An Yang; Chao-Chang Chiu; Shin-Chi Lai; Jui-Lung Chen; Chih-Wei Chang; Che-Hao Meng; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai; et al. (ESSCIRC, 2015)

Self-adjustable feed-forward control and auto-tracking off-time control techniques for 95% accuracy and 95% efficiency AC-DC non-isolated LED driver. - Hsin Chen; Chi-Wei Chen; Hsueh-Yi Hsieh; Ke-Horng Chen; Tsung-Yen Tsai; Jian-Ru Lin; Ying-Hsi Lin; Chao-Cheng Lee; Pei-Ling Tseng (ISCAS, 2015)

99% High accuracy knee voltage detection for primary-side control in flyback converter. - Tsung-Hsun Tsai; Ke-Horng Chen; Tsung-Yen Tsai; Jian-Ru Lin; Ying-Hsi Lin; Chao-Cheng Lee; Pei-Ling Tseng (ISCAS, 2015)

Implantable biomedical device supplying by a 28nm CMOS self-calibration DC-DC buck converter with 97% output voltage accuracy. - Te-Fu Yang; Ru-Yu Huang; Yi-Ping Su; Balakumar; Ke-Horng Chen; Tsung-Yen Tsai; Jian-Ru Lin; Ying-Hsi Lin; Chao-Cheng Lee; Pei-Ling Tseng (ISCAS, 2015)

12.6 90% Peak efficiency single-inductor-multiple-output DC-DC buck converter with output independent gate drive control. - Yi-Ping Su; Chiun-He Lin; Shen-Yu Peng; Ru-Yu Huang; Te-Fu Yang; Shin-Hao Chen; Ting-Jung Lo; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; et al. (ISSCC, 2015)

Single-Inductor Quad-Output Switching Converter With Priority-Scheduled Program for Fast Transient Response and Unlimited Load Range in 40 nm CMOS Technology. - Wei-Chung Chen; Yi-Ping Su; Tzu-Chi Huang; Tsu-Wei Tsai; Ruei-Hong Peng; Kuei-Liang Lin; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Shian-Ru Lin; Tsung-Yen Tsai (IEEE J. Solid State Circuits, 2015)

A 0.003 mm2 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching. - Jen-Huan Tsai; Hui-Huan Wang; Yang-Chi Yen; Chang-Ming Lai; Yen-Ju Chen; Po-Chiun Huang; Ping-Hsuan Hsieh; Hsin Chen; Chao-Cheng Lee (IEEE J. Solid State Circuits, 2015)

A 0.6 V Resistance-Locked Loop Embedded Digital Low Dropout Regulator in 40 nm CMOS With 80.5% Power Supply Rejection Improvement. - Chao-Chang Chiu; Po-Hsien Huang; Moris Lin; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chao-Cheng Lee (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression. - Ming-Chiuan Su; Wei-Zen Chen; Pei-Si Wu; Yu-Hsian Chen; Chao-Cheng Lee; Shyh-Jye Jou (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A Low-THD Class-D Audio Amplifier With Dual-Level Dual-Phase Carrier Pulsewidth Modulation. - Shang-Hsien Yang; Yuan-Han Yang; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Shian-Ru Lin; Chao-Cheng Lee (IEEE Trans. Ind. Electron., 2015)

12.7 A 96%-efficiency and 0.5%-current-cross-regulation single-inductor multiple floating-output LED driver with 24b color resolution. - Hsiang-An Yang; Wen-Hau Yang; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai; Shin-Chi Lai (ISSCC, 2016)