Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2n, 2n+1-1, 2n-1). - Su-Hon Lin; Ming-Hwa Sheu; Chao-Hsiang Wang; Yuan-Ching Kuo (APCCAS, 2008)

Efficient VLSI Design of Residue-to-Binary Converter for the Moduli Set (2n, 2n+1 - 1, 2n - 1). - Su-Hon Lin; Ming-Hwa Sheu; Chao-Hsiang Wang (IEICE Trans. Inf. Syst., 2008)

Low-Active-Energy and Low-Standby-Power Sub-threshold ROM for IoT Edge Sensing Systems. - Jinn-Shyan Wang; Chien-Tung Liu; Chao-Hsiang Wang (VLSI-DAT, 2020)