3D-enabled customizable embedded computer (3DECC). - Paul D. Franzon; Eric Rotenberg; James Tuck 001; Huiyang Zhou; W. Rhett Davis; Hongwen Dai; Joonmoo Huh; Sungkwan Ku; Steve Lipa; Chao Li 004; Jong Beom Park; Joshua Schabel (3DIC, 2014)

Understanding the tradeoffs between software-managed vs. hardware-managed caches in GPUs. - Chao Li 004; Yi Yang 018; Hongwen Dai; Shengen Yan; Frank Mueller 001; Huiyang Zhou (ISPASS, 2014)

yaSpMV: yet another SpMV framework on GPUs. - Shengen Yan; Chao Li 004; Yunquan Zhang; Huiyang Zhou (PPoPP, 2014)

RACB: Resource Aware Cache Bypass on GPUs. - Hongwen Dai; Christos Kartsaklis; Chao Li 004; Tomislav Janjusic; Huiyang Zhou (SBAC-PAD (Workshops), 2014)

Automatic data placement into GPU on-chip memory resources. - Chao Li 004; Yi Yang 018; Zhen Lin; Huiyang Zhou (CGO, 2015)

Locality-Driven Dynamic GPU Cache Bypassing. - Chao Li 004; Shuaiwen Leon Song; Hongwen Dai; Albert Sidelnik; Siva Kumar Sastry Hari; Huiyang Zhou (ICS, 2015)

CUDA-NP: Realizing Nested Thread-Level Parallelism in GPGPU Applications. - Yi Yang 018; Chao Li 004; Huiyang Zhou (J. Comput. Sci. Technol., 2015)

A model-driven approach to warp/thread-block level GPU cache bypassing. - Hongwen Dai; Chao Li 004; Huiyang Zhou; Saurabh Gupta 002; Christos Kartsaklis; Mike Mantor (DAC, 2016)

Optimizing memory efficiency for deep convolutional neural networks on GPUs. - Chao Li 004; Yi Yang 018; Min Feng 001; Srimat T. Chakradhar; Huiyang Zhou (SC, 2016)

POSTER: Accelerate GPU Concurrent Kernel Execution by Mitigating Memory Pipeline Stalls. - Hongwen Dai; Zhen Lin; Chao Li 004; Chen Zhao 009; Fei Wang 008; Nanning Zheng 001; Huiyang Zhou (PACT, 2017)

Accelerate GPU Concurrent Kernel Execution by Mitigating Memory Pipeline Stalls. - Hongwen Dai; Zhen Lin; Chao Li 004; Chen Zhao 009; Fei Wang 008; Nanning Zheng 001; Huiyang Zhou (HPCA, 2018)