Chao Sun

Orcid: 0000-0002-1935-5691

Affiliations:
  • Chuo University, Department of Electrical, Electronic, and Communication, Tokyo, Japan
  • University of Tokyo, Electrical Engineering and Information System, Japan (PhD 2014)


According to our database1, Chao Sun authored at least 11 papers between 2012 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2017
Write Order-Based Garbage Collection Scheme for an LBA Scrambler Integrated SSD.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Design of Hybrid SSDs With Storage Class Memory and NAND Flash Memory.
Proc. IEEE, 2017

2016
LBA Scrambler: A NAND Flash Aware Data Management Scheme for High-Performance Solid-State Drives.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Design guidelines of storage class memory/flash hybrid solid-state drive considering system architecture, algorithm and workload characteristic.
IEEE Trans. Consumer Electron., 2016

System-Level Considerations on Design of 3D NAND Flash Memories.
Proceedings of the 3D Flash Memories, 2016

2015
SEA-SSD: A Storage Engine Assisted SSD With Application-Coupled Simulation Platform.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
A High Performance and Energy-Efficient Cold Data Eviction Algorithm for 3D-TSV Hybrid ReRAM/MLC NAND SSD.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Cost, Capacity, and Performance Analyses for Hybrid SCM/NAND Flash SSD.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A workload-aware-design of 3D-NAND flash memory for enterprise SSDs.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2013
Over 10-times high-speed, energy efficient 3D TSV-integrated hybrid ReRAM/MLC NAND SSD by intelligent data fragmentation suppression.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
x11 performance increase, x6.9 endurance enhancement, 93% energy reduction of 3D TSV-integrated hybrid ReRAM/MLC NAND SSDs by data fragmentation suppression.
Proceedings of the Symposium on VLSI Circuits, 2012


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