Transition Skew Coding: A Power and Area Efficient Encoding Technique for Global On-Chip Interconnects. - Charbel J. Akl; Magdy A. Bayoumi (ASP-DAC, 2007)

Reducing Delay Uncertainty of On-Chip Interconnects by Combining Inverting and Non-Inverting Repeaters Insertion. - Charbel J. Akl; Magdy A. Bayoumi (ISQED, 2007)

Assumers for high-speed single and multi-cycle on-chip interconnect with low repeater count. - Charbel J. Akl; Magdy A. Bayoumi (ACM Great Lakes Symposium on VLSI, 2008)

Cost-effective and low-power memory address bus encodings. - Charbel J. Akl; Magdy A. Bayoumi (ISCAS, 2008)

Reducing wakeup latency and energy of MTCMOS circuits via keeper insertion. - Charbel J. Akl; Magdy A. Bayoumi (ISLPED, 2008)

Feedback-Switch Logic (FSL): A High-Speed Low-Power Differential Dynamic-Like Static CMOS Circuit Family. - Charbel J. Akl; Magdy A. Bayoumi (ISQED, 2008)

Wiring-Area Efficient Simultaneous Bidirectional Point-to-Point Link for Inter-Block On-Chip Signaling. - Charbel J. Akl; Magdy A. Bayoumi (VLSI Design, 2008)

Self-Sleep Buffer for Distributed MTCMOS Design. - Charbel J. Akl; Magdy A. Bayoumi (VLSI Design, 2008)

Single-Phase SP-Domino: A Limited-Switching Dynamic Circuit Technique for Low-Power Wide Fan-in Logic Gates. - Charbel J. Akl; Magdy A. Bayoumi (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Reducing Interconnect Delay Uncertainty via Hybrid Polarity Repeater Insertion. - Charbel J. Akl; Magdy A. Bayoumi (IEEE Trans. Very Large Scale Integr. Syst., 2008)

An effective staggered-phase damping technique for suppressing power-gating resonance noise during mode transition. - Charbel J. Akl; Rafic A. Ayoubi; Magdy A. Bayoumi (ISQED, 2009)

Post-Silicon Clock-nvert (PSCI) for reducing process-variation induced skew in buffered clock networks. - Charbel J. Akl; Rafic A. Ayoubi; Magdy A. Bayoumi (ISQED, 2009)