A Placement Algorithm for FPGA Designs with Multiple I/O Standards. - Jason Helge Anderson; Jim Saunders; Sudip Nag; Chari Madabhushi; Rajeev Jayaraman (FPL, 2000)

Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis. - Jason Helge Anderson; Sudip Nag; Kamal Chaudhary; Sandor Kalman; Chari Madabhushi; Paul Cheng (FPL, 2004)