Should FPGAS abandon the pass-gate? - Charles Chiasson; Vaughn Betz (FPL, 2013)

COFFE: Fully-automated transistor sizing for FPGAs. - Charles Chiasson; Vaughn Betz (FPT, 2013)

On Hard Adders and Carry Chains in FPGAs. - Jason Luu; Conor McCullough; Sen Wang; Safeen Huda; Bo Yan; Charles Chiasson; Kenneth B. Kent; Jason Helge Anderson; Jonathan Rose; Vaughn Betz (FCCM, 2014)

Architectural Enhancements in Intel® Agilex™ FPGAs. - Jeffrey Chromczak; Mark Wheeler; Charles Chiasson; Dana How; Martin Langhammer; Tim Vanderhoek; Grace Zgheib; Ilya Ganusov (FPGA, 2020)

Optimizing FPGA Logic Block Architectures for Arithmetic. - Kevin E. Murray; Jason Luu; Matthew J. P. Walker; Conor McCullough; Sen Wang; Safeen Huda; Bo Yan; Charles Chiasson; Kenneth B. Kent; Jason Helge Anderson; Jonathan Rose; Vaughn Betz (IEEE Trans. Very Large Scale Integr. Syst., 2020)