A fast resolving BiNMOS synchronizer for parallel processor interconnect. - Jerry Jex; Charles Dike (IEEE J. Solid State Circuits, 1995)

A 900 Mb/s bidirectional signaling scheme. - Randy Mooney; Charles Dike; Shekhar Borkar (IEEE J. Solid State Circuits, 1995)

RAPPID: An Asynchronous Instruction Length Decoder. - Shai Rotem; Ken S. Stevens; Charles Dike; Marly Roncken; Boris Agapiev; Ran Ginosar; Rakefet Kol; Peter A. Beerel; Chris J. Myers; Kenneth Y. Yun (ASYNC, 1999)

Miller and noise effects in a synchronizing flip-flop. - Charles Dike; Edward Burton (IEEE J. Solid State Circuits, 1999)

An asynchronous instruction length decoder. - Kenneth S. Stevens; Shai Rotem; Ran Ginosar; Peter A. Beerel; Chris J. Myers; Kenneth Y. Yun; Rakefet Kol; Charles Dike; Marly Roncken (IEEE J. Solid State Circuits, 2001)

Intel's digital random number generator (DRNG). - George Cox; Charles Dike; D. J. Johnston (Hot Chips Symposium, 2011)