Built-in Self Testing of Embedded Memories. - Sunil K. Jain; Charles E. Stroud (IEEE Des. Test, 1986)

An Automated BIST Approach for General Sequential Logic Synthesis. - Charles E. Stroud (DAC, 1988)

Automated BIST for sequential logic synthesis. - Charles E. Stroud (IEEE Des. Test, 1988)

Behavioral model synthesis with Cones. - Charles E. Stroud; Ronald R. Munoz; David A. Pierce (IEEE Des. Test, 1988)

Design for Testability and Test Generation for Static Redundancy System Level Fault-Tolerant Circuits. - Charles E. Stroud; Ahmed E. Barbour (ITC, 1989)

Parallel Processing and Hardware Acceleration for Synthesis of VLSI Devices from Behavioral Models. - Charles E. Stroud; Ahmed E. Barbour (ICPP (1), 1990)

Built-In Self-Test for High-Speed Data-Path Circuitry. - Charles E. Stroud (ITC, 1991)

Distractions in Design for Testability and Built-Is Self-Test. - Charles E. Stroud (ITC, 1991)

Testability and test generation for majority voting fault-tolerant circuits. - Charles E. Stroud; Ahmed E. Barbour (J. Electron. Test., 1993)

Reliability of majority voting based VLSI fault-tolerant circuits. - Charles E. Stroud (IEEE Trans. Very Large Scale Integr. Syst., 1994)

A built-in self test scheme for VLSI. - T. Raju Damarla; Wei Su; Gerald T. Michael; Moon J. Chung; Charles E. Stroud (ASP-DAC, 1995)

Improving the efficiency of error identification via signature analysis. - Charles E. Stroud; T. Raju Damarla (VTS, 1995)

Multiple error detection and identification via signature analysis. - T. Raju Damarla; Charles E. Stroud; Avinash Sathaye (J. Electron. Test., 1995)

Evaluation of FPGA Resources for Built-In Self-Test of Programmable Logic Blocks. - Charles E. Stroud; Ping Chen; Srinivasa Konala; Miron Abramovici (FPGA, 1996)

Using ILA Testing for BIST in FPGAs. - Charles E. Stroud; Eric Lee; Srinivasa Konala; Miron Abramovici (ITC, 1996)

Built-in self-test of logic blocks in FPGAs (Finally, a free lunch: BIST without overhead!). - Charles E. Stroud; Srinivasa Konala; Ping Chen; Miron Abramovici (VTS, 1996)

A Parameterized VHDL Library for On-Line Testing. - Charles E. Stroud; M. Ding; S. Seshadri; Ramesh Karri; I. Kim; Subhajit Roy 001; S. Wu (ITC, 1997)

BIST-Based Diagnostics of FPGA Logic Blocks. - Charles E. Stroud; Eric Lee; Miron Abramovici (ITC, 1997)

Built-in self-test of FPGA interconnect. - Charles E. Stroud; Sajitha Wijesuriya; Carter Hamilton; Miron Abramovici (ITC, 1998)

Applying Built-In Self-Test to Majority Voting Fault Tolerant Circuits. - Charles E. Stroud; Joe K. Tannehill Jr. (VTS, 1998)

Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications. - Miron Abramovici; Charles E. Stroud; Carter Hamilton; Sajitha Wijesuriya; Vinay Verma (ITC, 1999)

Enhanced Bist-Based Diagnosis of FPGAs via Boundary Scan Access. - Carter Hamilton; Gretchen Gibson; Sajitha Wijesuriya; Charles E. Stroud (VTS, 1999)

Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration. - John Marty Emmert; Charles E. Stroud; Brandon Skaggs; Miron Abramovici (FCCM, 2000)

Performance Penalty for Fault Tolerance in Roving STARs. - John Marty Emmert; Charles E. Stroud; Jason A. Cheatham; Andrew M. Taylor; Pankaj Kataria; Miron Abramovici (FPL, 2000)

Improving On-Line BIST-Based Diagnosis for Roving STARs. - Miron Abramovici; Charles E. Stroud; Brandon Skaggs; John Marty Emmert (IOLTW, 2000)

DIST-based detection and diagnosis of multiple faults in FPGAs. - Miron Abramovici; Charles E. Stroud (ITC, 2000)

Bridging fault extraction from physical design data for manufacturing test development. - Charles E. Stroud; John Marty Emmert; John R. Bailey; Khushru S. Chhor; Dragan Nikolic (ITC, 2000)

A New Method for Testing Re-Programmable PLAs. - Charles E. Stroud; James R. Bailey; Johan R. Emmert (J. Electron. Test., 2000)

On-Line Fault Tolerance for FPGA Interconnect with Roving STARs. - John Marty Emmert; Stanley Baumgart; Pankaj Kataria; Andrew M. Taylor; Charles E. Stroud; Miron Abramovici (DFT, 2001)

Roving Stars: An Integrated Approach To On-Line Testing, Diagnosis, And Fault Tolerance For Fpgas In Adaptive Computing Systems. - Miron Abramovici; John Marty Emmert; Charles E. Stroud (Evolvable Hardware, 2001)

On-Line BIST and Diagnosis of FPGA Interconnect Using Roving STARs. - Miron Abramovici; Charles E. Stroud; Matthew Lashinsky; Jeremy Nall; John Marty Emmert (IOLTW, 2001)

Analog and Mixed Signal Benchmark Circuit Development: Who Needs Them? - Henry Chang; Steve Dollens; Gordon W. Roberts; Charles E. Stroud; Mani Soma; Jacob A. Abraham (VTS, 2001)

BIST-based test and diagnosis of FPGA logic blocks. - Miron Abramovici; Charles E. Stroud (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Using embedded FPGAs for SoC yield improvement. - Miron Abramovici; Charles E. Stroud; John Marty Emmert (DAC, 2002)

BIST-Based Diagnosis of FPGA Interconnect. - Charles E. Stroud; Jeremy Nall; Matthew Lashinsky; Miron Abramovici (ITC, 2002)

BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study. - Charles E. Stroud; Keshia N. Leach; Thomas A. Slaughter (ITC, 2003)

BIST-Based Delay-Fault Testing in FPGAs. - Miron Abramovici; Charles E. Stroud (J. Electron. Test., 2003)

Automatic Linearity (IP3) Test with Built-in Pattern Generator and Analyzer. - Foster F. Dai; Charles E. Stroud; Dayu Yang; Shuying Qi (ITC, 2004)

Built-In Self-Test for System-on-Chip: A Case Study. - Charles E. Stroud; John Sunwoo; Srinivas M. Garimella; Jonathan Harris (ITC, 2004)

Online BIST and BIST-based diagnosis of FPGA logic blocks. - Miron Abramovici; Charles E. Stroud; John Marty Emmert (IEEE Trans. Very Large Scale Integr. Syst., 2004)

On-Chip BIST-Based Diagnosis of Embedded Programmable Logic Cores in System-on-Chip Devices. - Charles E. Stroud; Srinivas M. Garimella; John Sunwoo (CATA, 2005)

Built-In Self-Test and Diagnosis of Multiple Embedded Cores in SoCs. - Srinivas M. Garimella; Charles E. Stroud (ESA, 2005)

Built-in self-test for automatic analog frequency response measurement. - Dayu Yang; Foster F. Dai; Charles E. Stroud (ISCAS (3), 2005)

An Architecture for Fail-Silent Operation of FPGAs and Configurable SoCs. - Lee Lerner; Charles E. Stroud (ESA, 2006)

Embedded Processor Based Built-In Self-Test and Diagnosis of Logic and Memory Resources in FPGAs. - Daniel T. Milton; Sachin Dhingra; Charles E. Stroud (ESA, 2006)

Analog frequency response measurement in mixed-signal systems. - Charles E. Stroud; Dayu Yang; Foster F. Dai (ISCAS, 2006)

An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults. - Jack R. Smith; Tian Xia; Charles E. Stroud (J. Electron. Test., 2006)

Automatic linearity and frequency response tests with built-in pattern generator and analyzer. - Foster F. Dai; Charles E. Stroud; Dayu Yang (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Noise Figure Measurement Using Mixed-Signal BIST. - Jie Qin; Charles E. Stroud; Foster F. Dai (ISCAS, 2007)

FPGA-Based Analog Functional Measurements for Adaptive Control in Mixed-Signal Systems. - Jie Qin; Charles E. Stroud; Fa Foster Dai (IEEE Trans. Ind. Electron., 2007)

Online Fault Tolerance for FPGA Logic Blocks. - John Marty Emmert; Charles E. Stroud; Miron Abramovici (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Logic Testing. - Laung-Terng Wang; Charles E. Stroud; Kwang-Ting (Tim) Cheng (Wiley Encyclopedia of Computer Science and Engineering, 2008)

Single Event Upset Detection and Correction in Virtex-4 and Virtex-5 FPGAs. - Bradley F. Dutton; Charles E. Stroud (CATA, 2009)

Built-in Self-Test for Memory Resources in Virtex-4 Field Programmable Gate Arrays. - Brooks R. Garrison; Daniel T. Milton; Charles E. Stroud (CATA, 2009)

Embedded Processor Based Fault Injection and SEU Emulation for FPGAs. - Bradley F. Dutton; Mustafa Ali; Charles E. Stroud; John Sunwoo (ESA, 2009)

Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs. - Bradley F. Dutton; Charles E. Stroud (ESA, 2009)

Application of Embedded Systems in Low Earth Orbit for Measurement of Ionospheric Anomalies. - George J. Starr; J. M. Wersinger; Richard Chapman; Lloyd Riggs; Victor P. Nelson; John Klingelhoeffer; Charles E. Stroud (ESA, 2009)

Soft Core Embedded Processor Based Built-In Self-Test of FPGAs. - Bradley F. Dutton; Charles E. Stroud (DFT, 2009)

Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems. - George J. Starr; Jie Qin; Bradley F. Dutton; Charles E. Stroud; Foster F. Dai; Victor P. Nelson (DFT, 2009)

On Built-In Self-Test for Adders. - Mary D. Pulukuri; Charles E. Stroud (J. Electron. Test., 2009)

The First Clock Cycle Is A Real BIST. - Charles E. Stroud; Bradley F. Dutton (ESA, 2010)

On-Line Single Event Upset Detection and Correction in Field Programmable Gate Array Configuration Memories. - Bradley F. Dutton; Charles E. Stroud (Int. J. Comput. Their Appl., 2010)

Selective Spectrum Analysis for Analog Measurements. - Jie Qin; Joseph Cali; Bradley F. Dutton; George J. Starr; Fa Foster Dai; Charles E. Stroud (IEEE Trans. Ind. Electron., 2011)