Debugging post-silicon fails in the IBM POWER8 bring-up lab. - Manoj Dusanapudi; S. Fields; Michael S. Floyd; Guy L. Guthrie; Ronald N. Kalla; Shakti Kapoor; Larry S. Leitner; Charles F. Marino; Joseph McGill; Amir Nahir; Kevin Reick; H. Shen; et al. (IBM J. Res. Dev., 2015)

The cache and memory subsystems of the IBM POWER8 processor. - William J. Starke; Jeffrey Stuecheli; David Daly; J. S. Dodson; Florian Auernhammer; Patricia Sagmeister; Guy L. Guthrie; Charles F. Marino; M. S. Siegel; Bart Blaner (IBM J. Res. Dev., 2015)

IBM POWER9 processor and system features for computing in the cognitive era. - L. Baba Arimilli; Bart Blaner; Ben C. Drerup; Charles F. Marino; Derek Williams; Eric N. Lais; Francesco A. Campisano; Guy L. Guthrie; Michael S. Floyd; Ross Leavens; Scot M. Willenborg; Ronald N. Kalla; et al. (IBM J. Res. Dev., 2018)