Charlie Huang

According to our database1, Charlie Huang authored at least 8 papers between 1996 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1994, "For engineering contributions and technical leadership in the development of high-volume GaAs MMIC's for commercial applications.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
An Experiment to Convert Structured Product Labels into Computable Prescribing Information.
Proceedings of the 9th IEEE International Conference on Healthcare Informatics, 2021

2013
A 0.4-mW/Gb/s Near-Ground Receiver Front-End With Replica Transconductance Termination Calibration for a 16-Gb/s Source-Series Terminated Transceiver.
IEEE J. Solid State Circuits, 2013

2012
A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface.
IEEE J. Solid State Circuits, 2012

A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface.
IEEE J. Solid State Circuits, 2012

A 0.4mW/Gb/s 16Gb/s near-ground receiver front-end with replica transconductance termination calibration.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2003
A 0.4-4-Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs.
IEEE J. Solid State Circuits, 2003

1999
A portable digital DLL for high-speed CMOS interface circuits.
IEEE J. Solid State Circuits, 1999

1996
A 660 MB/s interface megacell portable circuit in 0.3 μm-0.7 μm CMOS ASIC.
IEEE J. Solid State Circuits, 1996


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