Power andPerformance Analysis for Early Design Space Exploration. - Charles Thangaraj; Tom Chen 001 (ISVLSI, 2007)

Early Design Phase Power Performance Trade-Offs Using In-Situ Macro Models. - Charles Thangaraj; Tom Chen 001 (DELTA, 2008)

Design target exploration for meeting time-to-market using pareto analysis. - Charles Thangaraj; Tom Chen 001 (ISCAS, 2008)

Rapid design space exploration using legacy design data and technology scaling trend. - Charles Thangaraj; Alkan Cengiz; Tom Chen 001 (Integr., 2010)

Fully CMOS-Compatible On-Chip Optical Clock Distribution and Recovery. - Charles Thangaraj; Robert Pownall; Phil Nikkel; Guangwei Yuan; Kevin L. Lear; Tom Chen 001 (IEEE Trans. Very Large Scale Integr. Syst., 2010)