SIDECAR: Design Support for Reliability. - Charles R. Yount; Daniel P. Siewiorek (DAC, 1991)

A Methodology for the Rapid Injection of Transient Hardware Errors. - Charles R. Yount; Daniel P. Siewiorek (IEEE Trans. Computers, 1996)

Using Model Trees for Computer Architecture Performance Analysis of Software Applications. - ElMoustapha Ould-Ahmed-Vall; James Woodlee; Charles Yount; Kshitij A. Doshi; Seth Abraham (ISPASS, 2007)

Characterization of SPEC CPU2006 and SPEC OMP2001: Regression Models and their Transferability. - ElMoustapha Ould-Ahmed-Vall; Kshitij A. Doshi; Charles Yount; James Woodlee (ISPASS, 2008)

The Software Tuning Agent: A Tool for Workload Characterization and Microarchitecture Studies. - ElMoustapha Ould-Ahmed-Vall; James Woodlee; Charles Yount (Int. CMG Conference, 2009)

Vector Folding: Improving Stencil Performance via Multi-dimensional SIMD-vector Representation. - Charles Yount (HPCC/CSS/ICESS, 2015)

Graph-matching-based simulation-region selection for multiple binaries. - Charles Yount; Harish Patil; Mohammad S. Islam; Aditya Srikanth (ISPASS, 2015)

Effective Use of Large High-Bandwidth Memory Caches in HPC Stencil Computation via Temporal Wave-Front Tiling. - Charles Yount; Alejandro Duran (PMBS@SC, 2016)

YASK - Yet Another Stencil Kernel: A Framework for HPC Stencil Code-Generation and Tuning. - Charles Yount; Josh Tobin; Alexander Breuer; Alejandro Duran (WOLFHPC@SC, 2016)

Optimised finite difference computation from symbolic equations. - Michael Lange 001; Navjot Kukreja; Fabio Luporini; Mathias Louboutin; Charles Yount; Jan Hückelheim; Gerard J. Gorman (SciPy, 2017)

Accelerating Seismic Simulations Using the Intel Xeon Phi Knights Landing Processor. - Josh Tobin; Alexander Breuer; Alexander Heinecke; Charles Yount; Yifeng Cui (ISC, 2017)

Performance Optimization of Fully Anisotropic Elastic Wave Propagation on 2nd Generation Intel® Xeon Phi(TM) Processors. - Albert Farrés; Claudia Rosas; Mauricio Hanzich; Alejandro Duran; Charles Yount (IPDPS Workshops, 2018)

Multi-level spatial and temporal tiling for efficient HPC stencil computation on many-core processors with large shared caches. - Charles Yount; Alejandro Duran; Josh Tobin (Future Gener. Comput. Syst., 2019)

Architecture and Performance of Devito, a System for Automated Stencil Computation. - Fabio Luporini; Mathias Louboutin; Michael Lange 001; Navjot Kukreja; Philipp A. Witte; Jan Hückelheim; Charles Yount; Paul H. J. Kelly; Felix J. Herrmann; Gerard J. Gorman (ACM Trans. Math. Softw., 2020)