A many-core architecture for in-memory data processing. - Sandeep R. Agrawal; Sam Idicula; Arun Raghavan; Evangelos Vlachos; Venkatraman Govindaraju; Venkatanathan Varadarajan; Cagri Balkesen; Georgios Giannikis; Charlie Roth; Nipun Agarwal; Eric Sedlar (MICRO, 2017)