A Novel Low Power Noise Tolerant High Performance Dynamic Feed through Logic Design Technique. - Manisha Pattanaik; Shashank Parashar; Chaudhry Indra Kumar; Akanksha Chouhan; Vikas Mahor (ISED, 2011)

An Efficient Design Technique for High Performance Dynamic Feedthrough Logic with Enhanced Noise Tolerance. - Shashank Parashar; Chaudhry Indra Kumar; Manisha Pattanaik (ISVLSI, 2011)

A novel energy-efficient self-correcting methodology employing INWE. - Chaudhry Indra Kumar; Arvind Kumar Sharma; Sandeep Miryala; Anand Bulusu (SMACD, 2016)

Design and Analysis of Energy Efficient Self Correcting Latches considering Metastability. - Chaudhry Indra Kumar; Anand Bulusu (PRIME, 2018)

High performance energy efficient radiation hardened latch for low voltage applications. - Chaudhry Indra Kumar; Anand Bulusu (Integr., 2019)

An energy-efficient variation aware self-correcting latch. - Chaudhry Indra Kumar; Arvind Kumar Sharma; Rajendra Partap; Anand Bulusu (Microelectron. J., 2019)

A Physics-Based Variability-Aware Methodology to Estimate Critical Charge for Near-Threshold Voltage Latches. - Chaudhry Indra Kumar; Ishant Bhatia; Arvind Kumar Sharma; Deep Sehgal; H. S. Jatana; Anand Bulusu (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Design of highly reliable radiation hardened 10T SRAM cell for low voltage applications. - Raghav Shekhar; Chaudhry Indra Kumar (Integr., 2022)

An Energy-Efficient Low-Area Double-Node-Upset-Hardened Latch Design. - Chaudhry Indra Kumar (J. Circuits Syst. Comput., 2022)

An Energy-Efficient High CSNR XNOR and Accumulation Scheme for BNN. - Dinesh Kushwaha; Ashish Joshi; Chaudhry Indra Kumar; Neha Gupta; Sandeep Miryala; Rajiv V. Joshi; Sudeb Dasgupta; Anand Bulusu (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A Radiation-Hardened Double Node Upset Latch Design for Nanoscale CMOS Technologies. - Promit Mandal; Prince Kumar; Saarthak Vijay Singh; Chaudhry Indra Kumar (COMPENG, 2024)

A High Performance and Low Power Subthreshold Voltage Level Shifter Design. - Ananya Kapoor; Ayush Thapar; Chaitanya Shanker Jha; Chaudhry Indra Kumar (VLSID, 2024)

Design of high performance energy efficient CMOS voltage level shifter for mixed signal circuits applications. - Chaudhry Indra Kumar; Abhishek Chaudhary; Shreyansh Upadhyaya (Integr., 2024)