An 8-bit column-shared SAR ADC for CMOS image sensor applications. - Jin-Yi Lin; Kwuang-Han Chang; Chen-Che Kao; Shih-Chin Lo; Yan-Jiun Chen; Pei-Chen Lee; Chi-Hui Chen; Chin Yin; Chih-Cheng Hsieh (ISCAS, 2015)

A 0.4V 1.94fJ/conversion-step 10b 750kS/s SAR ADC with input-range-adaptive switching. - Pei-Chen Lee; Chen-Che Kao; Chih-Cheng Hsieh (ISCAS, 2016)

A 0.5 V 12-bit SAR ADC using adaptive timedomain comparator with noise optimization. - Chen-Che Kao; Sung-En Hsieh; Chih-Cheng Hsieh (A-SSCC, 2017)

A 0.5-V 12-bit SAR ADC Using Adaptive Time-Domain Comparator With Noise Optimization. - Sung-En Hsieh; Chen-Che Kao; Chih-Cheng Hsieh (IEEE J. Solid State Circuits, 2018)