A novel dynamic resource adjustment architecture for virtual tenant networks in SDN. - Yi-Wei Ma; Jiann-Liang Chen; Chen-Chia Chang; Akihiro Nakao; Shu Yamamoto (J. Syst. Softw., 2018)

Automatic Routability Predictor Development Using Neural Architecture Search. - Chen-Chia Chang; Jingyu Pan; Tunhou Zhang; Zhiyao Xie; Jiang Hu; Weiyi Qi; Chung-Wei Lin; Rongjian Liang; Joydeep Mitra; Elias Fallon; Yiran Chen 001 (ICCAD, 2021)

Time-Division Multiplexing Based System-Level FPGA Routing. - Wei-Kai Liu; Ming-Hung Chen; Chia-Ming Chang; Chen-Chia Chang; Yao-Wen Chang (ICCAD, 2021)

Towards collaborative intelligence: routability estimation based on decentralized private data. - Jingyu Pan; Chen-Chia Chang; Zhiyao Xie; Ang Li 005; Minxue Tang; Tunhou Zhang; Jiang Hu; Yiran Chen 001 (DAC, 2022)

Robustify ML-Based Lithography Hotspot Detectors. - Jingyu Pan; Chen-Chia Chang; Zhiyao Xie; Jiang Hu; Yiran Chen 001 (ICCAD, 2022)

DEEP: Developing Extremely Efficient Runtime On-Chip Power Meters. - Zhiyao Xie; Shiyu Li 001; Mingyuan Ma; Chen-Chia Chang; Jingyu Pan; Yiran Chen 001; Jiang Hu (ICCAD, 2022)

The Dark Side: Security Concerns in Machine Learning for EDA. - Zhiyao Xie; Jingyu Pan; Chen-Chia Chang; Yiran Chen 001 (CoRR, 2022)

Preplacement Net Length and Timing Estimation by Customized Graph Neural Network. - Zhiyao Xie; Rongjian Liang; Xiaoqing Xu; Jiang Hu; Chen-Chia Chang; Jingyu Pan; Yiran Chen 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Rethink before Releasing Your Model: ML Model Extraction Attack in EDA. - Chen-Chia Chang; Jingyu Pan; Zhiyao Xie; Jiang Hu; Yiran Chen 001 (ASP-DAC, 2023)

Fully Automated Machine Learning Model Development for Analog Placement Quality Prediction. - Chen-Chia Chang; Jingyu Pan; Zhiyao Xie; Yaguang Li; Yishuang Lin; Jiang Hu; Yiran Chen 001 (ASP-DAC, 2023)

PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions. - Qijun Zhang; Shiyu Li 001; Guanglei Zhou; Jingyu Pan; Chen-Chia Chang; Yiran Chen 001; Zhiyao Xie (ICCAD, 2023)

EDALearn: A Comprehensive RTL-to-Signoff EDA Benchmark for Democratized and Reproducible ML for EDA Research. - Jingyu Pan; Chen-Chia Chang; Zhiyao Xie; Yiran Chen 001 (CoRR, 2023)

The Dark Side: Security and Reliability Concerns in Machine Learning for EDA. - Zhiyao Xie; Jingyu Pan; Chen-Chia Chang; Jiang Hu; Yiran Chen 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

EDALearn: A Comprehensive RTL-to-Signoff EDA Benchmark for Democratized and Reproducible ML for EDA Research. - Jingyu Pan; Chen-Chia Chang; Zhiyao Xie; Yiran Chen 001; Hai Helen Li (ICCAD, 2024)

LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits. - Chen-Chia Chang; Yikang Shen; Shaoze Fan; Jing Li 025; Shun Zhang; Ningyuan Cao; Yiran Chen 001; Xin Zhang 025 (ICML, 2024)

LaMAGIC: Language-Model-based Topology Generation for Analog Integrated Circuits. - Chen-Chia Chang; Yikang Shan; Shaoze Fan; Jing Li 073; Shun Zhang; Ningyuan Cao; Yiran Chen 001; Xin Zhang 025 (CoRR, 2024)

Toward Fully Automated Machine Learning for Routability Estimator Development. - Chen-Chia Chang; Jingyu Pan; Zhiyao Xie; Tunhou Zhang; Jiang Hu; Yiran Chen 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

PRICING: Privacy-Preserving Circuit Data Sharing Framework for Lithographic Hotspot Detection. - Chen-Chia Chang; Wan-Hsuan Lin; Jingyu Pan; Guanglei Zhou; Zhiyao Xie; Jiang Hu; Yiran Chen 001 (ASP-DAC, 2025)

ChipVQA: Benchmarking Visual Language Models for Chip Design. - Haoyu Yang; Qijing Huang 001; Nathaniel Ross Pinckney; Walker J. Turner; Wenfei Zhou; Yanqing Zhang 002; Chia-Tung Ho; Chen-Chia Chang; Haoxing Ren (DATE, 2025)

DRC-Coder: Automated DRC Checker Code Generation Using LLM Autonomous Agent. - Chen-Chia Chang; Chia-Tung Ho; Yaguang Li; Yiran Chen 001; Haoxing Ren (ISPD, 2025)

Improving Routability Prediction via NAS Using a Smooth One-Shot Augmented Predictor. - Arjun Sridhar; Chen-Chia Chang; Junyao Zhang; Yiran Chen 001 (ISQED, 2025)

Flexible Electronic Sensor for Noncontact Simultaneous Measurement of Capacitive Skin Sympathetic Nerve Activity (cSKNA) and cECG. - Dong-Yu Hsu; Yen-Ling Sung; Chiu-Yun Huang; En-Zhu Lyu; Chen-Chia Chang; Yu-Xiang Huang; Ting-Tse Lin; Kuan-Chih Huang; Shih-Hua Ni; Ting-Wei Wang (IEEE Trans. Instrum. Meas., 2025)

Fully Integrated Flexible Electromagnetic Induction-Based Patch for Noncontact Health Monitoring. - Dong-Yu Hsu; Yen-Ling Sung; En-Zhu Lyu; Chiu-Yun Huang; Yu-Xiang Huang; Chen-Chia Chang; Yuan-Si Tsai; Chih-Kuan Chen; Shih-Hua Ni; Yu-Jen Chen; Ting-Wei Wang (IEEE Trans. Instrum. Meas., 2025)

A Survey of Research in Large Language Models for Electronic Design Automation. - Jingyu Pan; Guanglei Zhou; Chen-Chia Chang; Isaac Jacobson; Jiang Hu; Yiran Chen 001 (ACM Trans. Design Autom. Electr. Syst., 2025)

LaMAGIC2: Advanced Circuit Formulations for Language Model-Based Analog Topology Generation. - Chen-Chia Chang; Wan-Hsuan Lin; Yikang Shen; Yiran Chen 001; Xin Zhang 025 (CoRR, 2025)

CROP: Circuit Retrieval and Optimization with Parameter Guidance using LLMs. - Jingyu Pan; Isaac Jacobson; Zheng Zhao; Tung-Chieh Chen; Guanglei Zhou; Chen-Chia Chang; Vineet Rashingkar; Yiran Chen 001 (CoRR, 2025)