A 4MHz BW 69dB SNDR continuous-time delta-sigma modulator with reduced sensitivity to clock jitter. - Yu-Cheng Chang; Wei-Hao Chiu; Chen-Chien Lin; Tsung-Hsien Lin (A-SSCC, 2011)

A 0.89-mW 1-MHz 62-dB SNDR Continuous-Time Delta-Sigma Modulator With an Asynchronous Sequential Quantizer and Digital Excess-Loop-Delay Compensation. - Chan-Hsiang Weng; Chen-Chien Lin; Yu-Cheng Chang; Tsung-Hsien Lin (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A low-power dual-mode continuous-time delta-sigma modulator with a folded quantizer. - Chen-Chien Lin; Chan-Hsiang Weng; Tsung-Hsien Lin (VLSI-DAT, 2013)

A TDC-Based Two-Step Quantizer With Swapper Technique for a Multibit Continuous-Time Delta-Sigma Modulator. - Chen-Chien Lin; Chan-Hsiang Weng; Tzu-An Wei; Yung-Yu Lin; Tsung-Hsien Lin (IEEE Trans. Circuits Syst. II Express Briefs, 2014)