A 10b 200MS/s pipelined folding ADC with offset calibration. - Cheng-Chung Hsu; Chen-Chih Huang; Ying-Hsi Lin; Chao-Cheng Lee (ESSCIRC, 2007)

An 11b 800MS/s Time-Interleaved ADC with Digital Background Calibration. - Cheng-Chung Hsu; Fong-Ching Huang; Chih-Yung Shih; Chen-Chih Huang; Ying-Hsi Lin; Chao-Cheng Lee; Behzad Razavi (ISSCC, 2007)

A high efficiency and compact size 65nm power management module with 1.2v low-voltage PWM controller for UWB system application. - Yu-Huei Lee; Shih-Jung Wang; Yao-Yi Yang; Kuo-Lin Zheng; Po-Fung Chen; Chun-Yu Hsieh; Ming-Hsin Huang; Yu-Nong Tsai; Yu-Zhou Ke; Ke-Horng Chen; Yi-Kuang Chen; Chen-Chih Huang; et al. (ESSCIRC, 2009)

A DVS Embedded Power Management for High Efficiency Integrated SoC in UWB System. - Yu-Huei Lee; Yao-Yi Yang; Ke-Horng Chen; Ying-Hsi Lin; Shih-Jung Wang; Kuo-Lin Zheng; Po-Fung Chen; Chun-Yu Hsieh; Yu-Zhou Ke; Yi-Kuang Chen; Chen-Chih Huang (IEEE J. Solid State Circuits, 2010)

On-the-fly dynamic voltage scaling (DVS) in 65nm energy-efficient power management with frequency-based control (FBC) for SoC system. - Yu-Huei Lee; Chao-Chang Chiu; Ke-Horng Chen; Ying-Hsi Lin; Chen-Chih Huang (A-SSCC, 2011)

Minimized Transient and Steady-State Cross Regulation in 55-nm CMOS Single-Inductor Dual-Output (SIDO) Step-Down DC-DC Converter. - Yu-Huei Lee; Tzu-Chi Huang; Yao-Yi Yang; Wen-Shen Chou; Ke-Horng Chen; Chen-Chih Huang; Ying-Hsi Lin (IEEE J. Solid State Circuits, 2011)

Interleaving Energy-Conservation Mode (IECM) Control in Single-Inductor Dual-Output (SIDO) Step-Down Converters With 91% Peak Efficiency. - Yu-Huei Lee; Yao-Yi Yang; Shih-Jung Wang; Ke-Horng Chen; Ying-Hsi Lin; Yi-Kuang Chen; Chen-Chih Huang (IEEE J. Solid State Circuits, 2011)

A single-inductor dual-output (SIDO) based power management with adaptive bus voltage modulation and zero cross-regulation in 40nm CMOS. - Yu-Huei Lee; Tzu-Chi Huang; Kuan-Yu Chu; Chao-Chang Chiu; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Ching-Yuan Yeh; Chen-Chih Huang; Chao-Cheng Lee (ESSCIRC, 2012)

Inductorless and electrolytic capacitorless pseudo-sine current controller in LED lighting system with 1.1W/2.2W power reduction. - Yi-Ping Su; Shao-Wei Chiu; Chun-Chieh Kuo; Yu-Huei Lee; Ke-Horng Chen; Ying-Hsi Lin; Chen-Chih Huang; Chao-Cheng Lee; Yu-Wen Chen (ESSCIRC, 2012)

A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance. - Yu-Huei Lee; Shen-Yu Peng; Alex Chun-Hsien Wu; Chao-Chang Chiu; Yao-Yi Yang; Ming-Hsin Huang; Ke-Horng Chen; Ying-Hsi Lin; Shih-Wei Wang; Ching-Yuan Yeh; Chen-Chih Huang; Chao-Cheng Lee (VLSIC, 2012)

An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter. - Wen-Shen Chou; Tzu-Chi Huang; Yu-Huei Lee; Yao-Yi Yang; Yi-Ping Su; Ke-Horng Chen; Chen-Chih Huang; Ying-Hsi Lin; Chao-Cheng Lee; Kuei-Ann Wen; Ying-Chih Hsu; Yung-Chow Peng; et al. (IEEE J. Solid State Circuits, 2012)

A Battery-Free 217 nW Static Control Power Buck Converter for Wireless RF Energy Harvesting With ά-Calibrated Dynamic On/Off Time and Adaptive Phase Lead Control. - Tzu-Chi Huang; Chun-Yu Hsieh; Yao-Yi Yang; Yu-Huei Lee; Yu-Chai Kang; Ke-Horng Chen; Chen-Chih Huang; Ying-Hsi Lin; Ming-Wei Lee (IEEE J. Solid State Circuits, 2012)

A Near-Optimum Dynamic Voltage Scaling (DVS) in 65-nm Energy-Efficient Power Management With Frequency-Based Control (FBC) for SoC System. - Yu-Huei Lee; Chao-Chang Chiu; Shen-Yu Peng; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Chen-Chih Huang; Tsung-Yen Tsai (IEEE J. Solid State Circuits, 2012)

A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement. - Yu-Huei Lee; Shen-Yu Peng; Chao-Chang Chiu; Alex Chun-Hsien Wu; Ke-Horng Chen; Ying-Hsi Lin; Shih-Wei Wang; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee (IEEE J. Solid State Circuits, 2013)

Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings. - Shen-Yu Peng; Tzu-Chi Huang; Yu-Huei Lee; Chao-Chang Chiu; Ke-Horng Chen; Ying-Hsi Lin; Chao-Cheng Lee; Tsung-Yen Tsai; Chen-Chih Huang; Long-Der Chen; Cheng-Chen Yang (IEEE J. Solid State Circuits, 2013)

A 2.5W tablet speaker delivering 3.2W pseudo high power by psychoacoustic model based adaptive power management system. - Shin-Hao Chen; Shen-Yu Peng; Ke-Horng Chen; Shin-Chi Lai; Sheng Kang; Kevin Cheng 002; Ying-Hsi Lin; Chen-Chih Huang; Chao-Cheng Lee (A-SSCC, 2014)

Single inductor quad output switching converter with priority-scheduled program for fast transient and unlimited-load range in 40nm CMOS technology. - Wei-Chung Chen; Tzu-Chi Huang; Tsu-Wei Tsai; Ruei-Hong Peng; Kuei-Liang Lin; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Li-Ren Huang; Chao-Jen Huang; et al. (ESSCIRC, 2014)

A pseudo fixed switching frequency 2kHz/A in optimum on-time control buck converter with predicting correction technique for EMI solution. - Wei-Chung Chen; Kuei-Liang Lin; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin-Yu Luo; Shih-Ming Wang; et al. (ISCAS, 2014)

A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. - Ying-Wei Chou; Meng-Wei Chien; Shin-Chieh Chen; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin-Yu Luo; et al. (ISCAS, 2014)

A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. - Shang-Hsien Yang; Yuan-Han Yang; Ke-Horng Chen; Chung-Chih Hung; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; et al. (ISCAS, 2014)

±3% voltage variation and 95% efficiency 28nm constant on-time controlled step-down switching regulator directly supplying to Wi-Fi systems. - Wei-Chung Chen; Yung-Sheng Huang; Meng-Wei Chien; Ying-Wei Chou; Hsin-Chieh Chen; Yi-Ping Su; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee (VLSIC, 2014)

A direct AC-DC and DC-DC cross-source energy harvesting circuit with analog iterating-based MPPT technique with 72.5% conversion efficiency and 94.6% tracking efficiency. - Tzu-Chi Huang; Ming-Jhe Du; Kuei-Liang Lin; Shao Siang Ng; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Jui-Lung Chen; Hung-Wei Chen (VLSIC, 2014)

99.4% peak audio signal recovery rate and ultra-low 0.32dB matching error with 10Hz high resolution filter fitting wearable aided speech compensation system. - Yen-Ting Lin; Shin-Chi Lai; Shin-Hao Chen; Shen-Yu Peng; Ke-Horng Chen; Sheng Kang; Kevin Cheng 002; Ying-Hsi Lin; Chen-Chih Huang; Chao-Cheng Lee (A-SSCC, 2015)