A single-channel 10-b 400-MS/s 8.7-mW pipeline ADC in a 90-nm technology. - Chen-Kai Hsu; Tai-Cheng Lee (A-SSCC, 2015)

Visual Movement and Mental-Workload for Pilot Performance Assessment. - Chen-Kai Hsu; Shu-Chiang Lin; Wen-Chin Li (HCI (6), 2015)

The evaluation of military pilot's attention distributions on the flight deck. - Wen-Chin Li; Graham R. Braithwaite; Matthew Greaves; Chen-Kai Hsu; Shu-Chiang Lin (HCI-Aero, 2016)

A 0.01mm2 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor. - Linxiao Shen; Yi Shen 007; Xiyuan Tang; Chen-Kai Hsu; Wei Shi 011; Shaolan Li; Wenda Zhao; Abhishek Mukherjee; Nan Sun 001 (ISSCC, 2019)

A 75.8dB-SNDR Pipeline SAR ADC with 2nd-order Interstage Gain Error Shaping. - Chen-Kai Hsu; Nan Sun 001 (VLSI Circuits, 2019)

Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters. - Jiaxin Liu; Chen-Kai Hsu; Xiyuan Tang; Shaolan Li; Guangjun Wen; Nan Sun 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A 77.1-dB 6.25-MHz-BW Pipeline SAR ADC with Enhanced Interstage Gain Error Shaping and Quantization Error Shaping. - Chen-Kai Hsu; Xiyuan Tang; Wenda Zhao; Rui Xu 008; Abhishek Mukherjee; Timothy R. Andeen; Nan Sun 001 (CICC, 2020)

9.5 A 13.5b-ENOB Second-Order Noise-Shaping SAR with PVT-Robust Closed-Loop Dynamic Amplifier. - Xiyuan Tang; Xiangxing Yang; Wenda Zhao; Chen-Kai Hsu; Jiaxin Liu; Linxiao Shen; Abhishek Mukherjee; Wei Shi 011; David Z. Pan; Nan Sun 001 (ISSCC, 2020)

A Pipeline SAR ADC With Second-Order Interstage Gain Error Shaping. - Chen-Kai Hsu; Timothy R. Andeen; Nan Sun 001 (IEEE J. Solid State Circuits, 2020)

A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier. - Xiyuan Tang; Xiangxing Yang; Wenda Zhao; Chen-Kai Hsu; Jiaxin Liu; Linxiao Shen; Abhishek Mukherjee; Wei Shi 011; Shaolan Li; David Z. Pan; Nan Sun 001 (IEEE J. Solid State Circuits, 2020)

A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping. - Chen-Kai Hsu; Xiyuan Tang; Jiaxin Liu; Rui Xu 008; Wenda Zhao; Abhishek Mukherjee; Timothy R. Andeen; Nan Sun 001 (IEEE J. Solid State Circuits, 2021)

A 90-dB-SNDR Calibration-Free Fully Passive Noise-Shaping SAR ADC With 4× Passive Gain and Second-Order DAC Mismatch Error Shaping. - Jiaxin Liu; Xing Wang; Zijie Gao; Mingtao Zhan; Xiyuan Tang; Chen-Kai Hsu; Nan Sun 001 (IEEE J. Solid State Circuits, 2021)

A 74.5-dB Dynamic Range 10-MHz BW CT-ΔΣ ADC With Distributed-Input VCO and Embedded Capacitive-π Network in 40-nm CMOS. - Abhishek Mukherjee; Miguel Gandara; Xiangxing Yang; Linxiao Shen; Xiyuan Tang; Chen-Kai Hsu; Nan Sun 001 (IEEE J. Solid State Circuits, 2021)