Exploration of Full HD Media Decoding on SDR Baseband Processor. - Chen Mei; Min Li 001; Peng Cao 002; Amir Amin; Chunshu Li; Sofie Pollin; Jun Yang 006 (SiPS, 2012)

Date Flow Optimization of Dynamically Coarse Grain Reconfigurable Architecture for Multimedia Applications. - Xinning Liu; Chen Mei; Peng Cao 002; Min Zhu 001; Longxing Shi (IEICE Trans. Inf. Syst., 2012)

Dynamic Allocation of SPM Based on Time-Slotted Cache Conflict Graph for System Optimization. - Jianping Wu; Ming Ling; Yang Zhang; Chen Mei; Huan Wang (IEICE Trans. Inf. Syst., 2012)

A novel energy-oriented reconfigurable on-chip unified memory architecture based on Cache Behavior Phase Graph. - Jianping Wu; Ming Ling; Yang Zhang; Chen Mei; Huan Wang (ASICON, 2013)

Exploration of Full HD Media Decoding on a Software Defined Radio Baseband Processor. - Chen Mei; Min Li 001; Peng Cao 002; Amir Amin; Chunshu Li; Jun Yang 006; Antoine Dejonghe; Liesbet Van der Perre; Longxing Shi; Sofie Pollin (IEEE Trans. Signal Process., 2013)

Hierarchical Pipeline Optimization of Coarse Grained Reconfigurable Processor for Multimedia Applications. - Chen Mei; Peng Cao 002; Yang Zhang 132; Bo Liu 019; Leibo Liu (IPDPS Workshops, 2014)

A novel configuration context cache structure of reconfigurable systems. - Yu Gong; Bo Liu 019; Chen Mei; Rui-he Wang (ASICON, 2015)

Programming Models for Determining Optimal R&D Arrangement in Mobile Application Development Process. - Yuan Liu; Chen Mei; Jingjing Hao (IEEE Access, 2022)