Re-architecting DRAM memory systems with monolithically integrated silicon photonics. - Scott Beamer; Chen Sun 003; Yong-Jin Kwon; Ajay Joshi; Christopher Batten; Vladimir Stojanovic; Krste Asanovic (ISCA, 2010)

Addressing link-level design tradeoffs for integrated photonic interconnects. - Michael Georgas; Jonathan C. Leu; Benjamin Moss; Chen Sun 003; Vladimir Stojanovic (CICC, 2011)

Cross-layer Energy and Performance Evaluation of a Nanophotonic Manycore Processor System Using Real Application Workloads. - George Kurian; Chen Sun 003; Chia-Hsin Owen Chen; Jason E. Miller; Jürgen Michel; Lan Wei; Dimitri A. Antoniadis; Li-Shiuan Peh; Lionel C. Kimerling; Vladimir Stojanovic; Anant Agarwal (IPDPS, 2012)

DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling. - Chen Sun 003; Chia-Hsin Owen Chen; George Kurian; Lan Wei; Jason E. Miller; Anant Agarwal; Li-Shiuan Peh; Vladimir Stojanovic (NOCS, 2012)

A 1.23pJ/b 2.5Gb/s monolithically integrated optical carrier-injection ring modulator and all-digital driver circuit in commercial 45nm SOI. - Benjamin Moss; Chen Sun 003; Michael Georgas; Jeffrey Shainline; Jason Orcutt; Jonathan C. Leu; Mark T. Wade; Yu-Hsin Chen; Kareem Nammari; Xiaoxi Wang; Hanqing Li; Rajeev J. Ram; et al. (ISSCC, 2013)

A 45nm 1.3GHz 16.7 double-precision GFLOPS/W RISC-V processor with vector accelerators. - Yunsup Lee; Andrew Waterman; Rimas Avizienis; Henry Cook; Chen Sun 003; Vladimir Stojanovic; Krste Asanovic (ESSCIRC, 2014)

Energy-efficient active photonics in a zero-change, state-of-the-art CMOS process. - Mark T. Wade; Jeffrey M. Shainline; Jason S. Orcutt; Chen Sun 003; Rajesh Kumar; Benjamin Moss; Michael Georgas; Rajeev J. Ram; Vladimir Stojanovic; Milos A. Popovic (OFC, 2014)

A monolithically-integrated optical transmitter and receiver in a zero-change 45nm SOI process. - Michael Georgas; Benjamin Moss; Chen Sun 003; Jeffrey Shainline; Jason Orcutt; Mark T. Wade; Yu-Hsin Chen; Kareem Nammari; Jonathan C. Leu; Aravind Srinivasan; Rajeev J. Ram; Milos A. Popovic; et al. (VLSIC, 2014)

Demonstration of an optical chip-to-chip link in a 3D integrated electronic-photonic platform. - Krishna T. Settaluri; Sen Lin 002; Sajjad Moazeni; Erman Timurdogan; Chen Sun 003; Michele Moresco; Zhan Su 001; Yu-Hsin Chen; Gerald Leake; Douglas LaTulipe; Colin McDonough; Jeremiah Hebding; et al. (ESSCIRC, 2015)

DELPHI: a framework for RTL-based architecture design evaluation using DSENT models. - Michael Papamichael; Cagla Cakir; Chen Sun 003; Chia-Hsin Owen Chen; James C. Hoe; Ken Mai; Li-Shiuan Peh; Vladimir Stojanovic (ISPASS, 2015)

An ultra low power 3D integrated intra-chip silicon electronic-photonic link. - Erman Timurdogan; Zhan Su 001; Krishna T. Settaluri; Sen Lin 002; Sajjad Moazeni; Chen Sun 003; Gerald Leake; Douglas D. Coolbaugh; Benjamin R. Moss; Michele Moresco; Vladimir Stojanovic; Michael R. Watts (OFC, 2015)

A 45nm SOI monolithic photonics chip-to-chip link with bit-statistics-based resonant microring thermal tuning. - Chen Sun 003; Mark T. Wade; Michael Georgas; Sen Lin 002; Luca Alloatti; Benjamin Moss; Rajesh Kumar; Amir Atabaki; Fabio Pavanello; Rajeev J. Ram; Milos A. Popovic; Vladimir Stojanovic (VLSIC, 2015)

A Monolithically-Integrated Chip-to-Chip Optical Link in Bulk CMOS. - Chen Sun 003; Michael Georgas; Jason Orcutt; Benjamin Moss; Yu-Hsin Chen; Jeffrey Shainline; Mark T. Wade; Karan Mehta 001; Kareem Nammari; Erman Timurdogan; Daniel L. Miller; Ofer Tehar-Zahav; et al. (IEEE J. Solid State Circuits, 2015)

Single-chip microprocessor that communicates directly using light. - Chen Sun 003; Mark T. Wade; Yunsup Lee; Jason S. Orcutt; Luca Alloatti; Michael Georgas; Andrew Waterman; Jeffrey M. Shainline; Rimas Avizienis; Sen Lin 002; Benjamin Moss; Rajesh Kumar; et al. (Nat., 2015)

Silicon-photonics for very large scale integrated systems. - Chen Sun 003 (2015)

A 12Gb/s, 8.6µApp input sensitivity, monolithic-integrated fully differential optical receiver in CMOS 45nm SOI process. - Nandish Mehta; Chen Sun 003; Mark T. Wade; Sen Lin 002; Milos A. Popovic; Vladimir Stojanovic (ESSCIRC, 2016)

A 45 nm CMOS-SOI Monolithic Photonics Platform With Bit-Statistics-Based Resonant Microring Thermal Tuning. - Chen Sun 003; Mark T. Wade; Michael Georgas; Sen Lin 002; Luca Alloatti; Benjamin Moss; Rajesh Kumar; Amir H. Atabaki; Fabio Pavanello; Jeffrey Shainline; Jason Orcutt; Rajeev J. Ram; et al. (IEEE J. Solid State Circuits, 2016)

WaveLight: A Monolithic Low Latency Silicon-Photonics Communication Platform for the Next-Generation Disaggregated Cloud Data Centers. - Mohammad Shahanshah Akhter; Paul Somogyi; Chen Sun 003; Mark T. Wade; Roy Meade; Pavan Bhargava; Sen Lin 002; Nandish Mehta (Hot Interconnects, 2017)

Microprocessor chip with photonic I/O. - Chen Sun 003; Mark T. Wade; Yunsup Lee; Jason S. Orcutt; Luca Alloatti; Michael S. Georgas; Andrew S. Waterman; Jeffrey M. Shainline; Rimas R. Avizienis; Sen Lin 002; Benjamin R. Moss; Rajesh Kumar; et al. (OFC, 2017)

A Bandwidth-Dense, Low Power Electronic-Photonic Platform and Architecture for Multi-Tbps Optical I/O. - Mark T. Wade; Michael L. Davenport; Marc De Cea Falco; Pavan Bhargava; John Michael Fini; Derek Van Orden; Roy Meade; Evelina Yeung; Rajeev R. Ram; Milos A. Popovic; Vladimir Stojanovic; Chen Sun 003 (ECOC, 2018)

Monolithic Optical Transceivers in 65 nm Bulk CMOS. - Amir H. Atabaki; Sajjad Moazeni; Fabio Pavanello; Hayk Gevorgyan; Jelena Notaros; Luca Alloatti; Mark T. Wade; Chen Sun 003; Seth A. Kruger; Kenaish Al Qubaisi; Imbert Wang; Bohan Zhang; et al. (OFC, 2018)

TeraPHY: A High-Density Electronic-Photonic Chiplet for Optical I/O from a Multi-Chip Module. - Roy Meade; Shahab Ardalan; Michael L. Davenport; John Michael Fini; Chen Sun 003; Mark T. Wade; Alexandra Wright-Gladstein; Chong Zhang (OFC, 2019)

A Differential Optical Receiver With Monolithic Split-Microring Photodetector. - Nandish Mehta; Chen Sun 003; Mark T. Wade; Vladimir Stojanovic (IEEE J. Solid State Circuits, 2019)

TeraPHY: A Chiplet Technology for Low-Power, High-Bandwidth In-Package Optical I/O. - Mark T. Wade; Roy Meade; Chandru Ramamurthy; Michael Rust; Forrest Sedgwick; Vladimir Stojanovic; Derek Van Orden; Chong Zhang; Chen Sun 003; Sergey Y. Shumarayev; Conor O'Keeffe; Erik Anderson; et al. (IEEE Micro, 2020)

8 Tbps Co-Packaged FPGA and Silicon Photonics Optical IO. - Kaveh Hosseini; Edwin Kok; Sergey Y. Shumarayev; Chia-Pin Chiu; Arnab Sarkar 004; Asako Toda; Yanjing Ke; Allen Chan; Daniel Jeong; Mason Zhang; Sangeeta Raman; Thungoc Tran; et al. (OFC, 2021)

An Error-free 1 Tbps WDM Optical I/O Chiplet and Multi-wavelength Multi-port Laser. - Mark T. Wade; Erik Anderson; Shahab Ardalan; Woorham Bae; Behrooz Beheshtian; Sidney Buchbinder; Ken Chang; Paulo Chao; Haritha Eachempatti; John Frey; Eric Jan; Austin Katzin; et al. (OFC, 2021)

Monolithic Microring-based WDM Optical I/O for Heterogeneous Computing. - Mark Wade; Daniel Jeong; Byungchae Kim; Mason Zhang; Woorham Bae; Chong Zhang; Pavan Bhargava; Derek Van Orden; Shahab Ardalan; Chandarasekaran Ramamurthy; Erik Anderson; Austin Katzin; et al. (VLSI Circuits, 2021)

5.12 Tbps Co-Packaged FPGA and Silicon Photonics Interconnect I/O. - Kaveh Hosseini; Edwin Kok; Sergey Y. Shumarayev; Daniel Jeong; Allen Chan; Austin Katzin; Songtao Liu; Radek Roucka; Manan Raval; Minh Mac; Chia-Pin Chiu; Thungoc Tran; et al. (VLSI Technology and Circuits, 2022)

Driving Compute Scale-out Performance with Optical I/O Chiplets in Advanced System-in-Package Platforms. - Mark Wade; Chen Sun 003; Matt Sysak; Vladimir Stojanovic; Pooya Tadayon; Ravi Mahajan; Babak Sabi (HCS, 2023)

Multi-wavelength sources for Optical IO Co-packaged optics. - Matthew N. Sysak; Radek Roucka; Nandita Aggarwal; Chen Li 044; Fernando Luna; Sally El-Hemawy; John Frey; Manan Raval; Ken Wang; Li-Fan Yang; Mark Wade; Chen Sun 003 (OFC, 2024)

A 256Gbps Microring-Based WDM Transceiver with Error-Free Wide Temperature Operation for Co-Packaged Optical I/O Chiplets. - Pavan Bhargava; Daniel Jeong; Eric Jan; Derek Van Orden; Derek Kita; Hayk Gevorgyan; Sidney Buchbinder; Anatoly Khilo; Woorham Bae; Sung-Jin Kim; John Michael Fini; Norman Chan; et al. (VLSI Technology and Circuits, 2024)

A UCIe Optical I/O Retimer Chiplet for AI Scale-up Fabrics. - Pavan Bhargava; Sidney Buchbinder; Dorde Gluhovic; Kaisarbek Omirzakhov; Ayan Biswas; Daniel Jeong; Clay Pearson; Austin Katzin; Eric Jan; Derek Van Orden; Hayk Gevorgyan; Anatoly Khilo; et al. (OFC, 2025)

Connectorized Optical I/O Chiplet with V-groove for AI and High Performance Computing. - Chong Zhang; Chip Greely; Jianhua Li; Li-Fan Yang; Annie Hsieh; Haiwei Lu; Neil Sapra; John Michael Fini; Vishal Chandrasekar; Lk Bhupathi; Vladimir Stojanovic; Chen Sun 003; et al. (OFC, 2025)