A novel parallel H.264 decoder using dynamic load balance on dual core embedded system. - Ding-Yun Chen; Chen-Tsai Ho; Chi-Cheng Ju; Chung-Hung Tsai (ICASSP, 2012)

MVSE: A Multi-core Video decoder System level analytics Engine. - Ding-Yun Chen; Chi-Cheng Ju; Chen-Tsai Ho; Chung-Hung Tsai (VLSI-DAT, 2013)

A panoramic video system by direct manipulation video navigation. - Chi-Cheng Ju; Ding-Yun Chen; Chen-Tsai Ho; Chung-Hung Tsai (ICME Workshops, 2014)

21.3 A 5.69mm2 0.98nJ/Pixel Image-Processing SoC with 24b High-Dynamic-Range and Multiple Sensor Format Support for Automotive Applications. - Chi-Cheng Ju; Tsu-Ming Liu; Yung-Chang Chang; Chih-Ming Wang; Chang-Hung Tsai; Ying-Jui Chen; Tung-Hsing Wu; Hue-Min Lin; Han-Liang Chou; Abrams Chen; Andy-HB Wang; W. C. Gu; et al. (ISSCC, 2020)