REDI: An Efficient Fault Oriented Procedure to Identify Redundant Faults in Combinational Logic Circuits. - Chen Wang 014; Irith Pomeranz; Sudhakar M. Reddy (ICCAD, 2001)

Conflict driven techniques for improving deterministic test pattern generation. - Chen Wang 014; Sudhakar M. Reddy; Irith Pomeranz; Xijiang Lin; Janusz Rajski (ICCAD, 2002)

On Compacting Test Response Data Containing Unknown Values. - Chen Wang 014; Sudhakar M. Reddy; Irith Pomeranz; Janusz Rajski; Jerzy Tyszer (ICCAD, 2003)

Convolutional Compaction of Test Responses. - Janusz Rajski; Jerzy Tyszer; Chen Wang 014; Sudhakar M. Reddy (ITC, 2003)

Fault Diagnosis in Designs with Convolutional Compactors. - Grzegorz Mrugalski; Chen Wang 014; Artur Pogiel; Jerzy Tyszer; Janusz Rajski (ITC, 2004)

Defect Aware Test Patterns. - Huaxing Tang; Gang Chen 011; Sudhakar M. Reddy; Chen Wang 014; Janusz Rajski; Irith Pomeranz (DATE, 2005)

Convolutional compaction-driven diagnosis of scan failures. - Grzegorz Mrugalski; Artur Pogiel; Janusz Rajski; Jerzy Tyszer; Chen Wang 014 (ETS, 2005)

On Efficient X-Handling Using a Selective Compaction Scheme to Achieve High Test Response Compaction Ratios. - Huaxing Tang; Chen Wang 014; Janusz Rajski; Sudhakar M. Reddy; Jerzy Tyszer; Irith Pomeranz (VLSI Design, 2005)

Finite memory test response compactors for embedded test applications. - Janusz Rajski; Jerzy Tyszer; Chen Wang 014; Sudhakar M. Reddy (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects. - Xijiang Lin; Kun-Han Tsai; Chen Wang 014; Mark Kassab; Janusz Rajski; Takeo Kobayashi; Randy Klingenberg; Yasuo Sato; Shuji Hamada; Takashi Aikyo (ATS, 2006)

Isolation of Failing Scan Cells through Convolutional Test Response Compaction. - Grzegorz Mrugalski; Janusz Rajski; Chen Wang 014; Artur Pogiel; Jerzy Tyszer (J. Electron. Test., 2007)

On the generation of compact test sets. - Amit Kumar 004; Janusz Rajski; Sudhakar M. Reddy; Chen Wang 014 (ITC, 2013)

Isometric test compression with low toggling activity. - Amit Kumar 004; Mark Kassab; Elham K. Moghaddam; Nilanjan Mukherjee 001; Janusz Rajski; Sudhakar M. Reddy; Jerzy Tyszer; Chen Wang 014 (ITC, 2014)

TestExpress - New Time-Effective Scan-Based Deterministic Test Paradigm. - Grzegorz Mrugalski; Janusz Rajski; Jedrzej Solecki; Jerzy Tyszer; Chen Wang 014 (ATS, 2015)

Isometric Test Data Compression. - Amit Kumar 004; Mark Kassab; Elham K. Moghaddam; Nilanjan Mukherjee 001; Janusz Rajski; Sudhakar M. Reddy; Jerzy Tyszer; Chen Wang 014 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Trimodal Scan-Based Test Paradigm. - Grzegorz Mrugalski; Janusz Rajski; Jedrzej Solecki; Jerzy Tyszer; Chen Wang 014 (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Hypercompression of Test Patterns. - Yu Huang 005; Sylwester Milewski; Janusz Rajski; Jerzy Tyszer; Chen Wang 014 (ITC, 2018)

TEA: A Test Generation Algorithm for Designs with Timing Exceptions. - Naixing Wang; Chen Wang 014; Kun-Han Tsai; Wu-Tung Cheng; Xijiang Lin; Mark Kassab; Irith Pomeranz (ATS, 2019)

Prediction of Test Pattern Count and Test Data Volume for Scan Architectures under Different Input Channel Configurations. - Fong-Jyun Tsai; Chong-Siao Ye; Kuen-Jong Lee; Shi-Xuan Zheng; Yu Huang 005; Wu-Tung Cheng; Sudhakar M. Reddy; Mark Kassab; Janusz Rajski; Chen Wang 014; Justyna Zawada (ITC, 2020)

Low Cost Hypercompression of Test Data. - Yu Huang 005; Sylwester Milewski; Janusz Rajski; Jerzy Tyszer; Chen Wang 014 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Accurate Estimation of Test Pattern Counts for a Wide-Range of EDT Input/Output Channel Configurations. - Shi-Xuan Zheng; Chung-Yu Yeh; Kuen-Jong Lee; Chen Wang 014; Wu-Tung Cheng; Mark Kassab; Janusz Rajski; Sudhakar M. Reddy (VTS, 2022)

Efficient Test Compression Configuration Selection. - Chong-Siao Ye; Shi-Xuan Zheng; Fong-Jyun Tsai; Chen Wang 014; Kuen-Jong Lee; Wu-Tung Cheng; Sudhakar M. Reddy; Justyna Zawada; Mark Kassab; Janusz Rajski (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)