Sensitivity enhancement using a nonlinear resonator. - Chenchen Deng; Steve Collins (APCCAS, 2010)

An energy-efficient coarse-grained dynamically reconfigurable fabric for multiple-standard video decoding applications. - Leibo Liu; Chenchen Deng; Dong Wang 040; Min Zhu 001; Shouyi Yin; Peng Cao 002; Shaojun Wei (CICC, 2013)

SURFEX: A 57fps 1080P resolution 220mW silicon implementation for simplified speeded-up robust feature with 65nm process. - Leibo Liu; Weilong Zhang; Chenchen Deng; Shouyi Yin; Shanshan Cai; Shaojun Wei (CICC, 2013)

Teach Reconfigurable Computing using mixed-grained fabrics based hardware infrastructure. - Chenchen Deng; Leibo Liu; Zhaoshi Li; Shouyi Yin; Shaojun Wei (FIE, 2014)

A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures. - Leibo Liu; Yu Ren; Chenchen Deng; Shouyi Yin; Shaojun Wei; Jie Han 001 (ASP-DAC, 2015)

Reliability-aware mapping for various NoC topologies and routing algorithms under performance constraints. - Chen Wu; Chenchen Deng; Leibo Liu; Shouyi Yin; Jie Han 001; Shaojun Wei (Sci. China Inf. Sci., 2015)

An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures. - Chen Wu; Chenchen Deng; Leibo Liu; Jie Han 001; Jiqiang Chen; Shouyi Yin; Shaojun Wei (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

A Flexible Energy- and Reliability-Aware Application Mapping for NoC-Based Reconfigurable Architectures. - Leibo Liu; Chen Wu; Chenchen Deng; Shouyi Yin; Qinghua Wu; Jie Han 001; Shaojun Wei (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A fast face detection architecture for auto-focus in smart-phones and digital cameras. - Peng Ouyang; Shouyi Yin; Chenchen Deng; Leibo Liu; Shaojun Wei (Sci. China Inf. Sci., 2016)

Against Double Fault Attacks: Injection Effort Model, Space and Time Randomization Based Countermeasures for Reconfigurable Array Architecture. - Bo Wang 023; Leibo Liu; Chenchen Deng; Min Zhu 001; Shouyi Yin; Shaojun Wei (IEEE Trans. Inf. Forensics Secur., 2016)

TLIA: Efficient Reconfigurable Architecture for Control-Intensive Kernels with Triggered-Long-Instructions. - Leibo Liu; Junbin Wang; Jianfeng Zhu 001; Chenchen Deng; Shouyi Yin; Shaojun Wei (IEEE Trans. Parallel Distributed Syst., 2016)

Minimizing Pipeline Stalls in Distributed-Controlled Coarse-Grained Reconfigurable Arrays with Triggered Instruction Issue and Execution. - Yanan Lu; Leibo Liu; Yangdong Deng; Jian Weng 004; Zhaoshi Li; Chenchen Deng; Shaojun Wei (DAC, 2017)

A 700fps Optimized Coarse-to-Fine Shape Searching Based Hardware Accelerator for Face Alignment. - Qiang Wang; Leibo Liu; Wenping Zhu; Huiyu Mo; Chenchen Deng; Shaojun Wei (DAC, 2017)

Implementation of in-loop filter for HEVC decoder on reconfigurable processor. - Leibo Liu; Yingjie Chen; Chenchen Deng; Shouyi Yin; Shaojun Wei (IET Image Process., 2017)

PMCC: Fast and Accurate System-Level Power Modeling for Processors on Heterogeneous SoC. - Chenchen Deng; Leibo Liu; Yang Liu 326; Shouyi Yin; Shaojun Wei (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Exploration of Benes Network in Cryptographic Processors: A Random Infection Countermeasure for Block Ciphers Against Fault Attacks. - Bo Wang 023; Leibo Liu; Chenchen Deng; Min Zhu 001; Shouyi Yin; Zhuoquan Zhou; Shaojun Wei (IEEE Trans. Inf. Forensics Secur., 2017)

A Multi-Objective Model Oriented Mapping Approach for NoC-based Computing Systems. - Chen Wu; Chenchen Deng; Leibo Liu; Jie Han 001; Jiqiang Chen; Shouyi Yin; Shaojun Wei (IEEE Trans. Parallel Distributed Syst., 2017)

Anole: A Highly Efficient Dynamically Reconfigurable Crypto-Processor for Symmetric-Key Algorithms. - Leibo Liu; Bo Wang 023; Chenchen Deng; Min Zhu 001; Shouyi Yin; Shaojun Wei (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

HReA: An Energy-Efficient Embedded Dynamically Reconfigurable Fabric for 13-Dwarfs Processing. - Leibo Liu; Zhaoshi Li; Chen Yang 005; Chenchen Deng; Shouyi Yin; Shaojun Wei (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A Reliable Physical Unclonable Function Based on Differential Charging Capacitors. - Hang Yuan; Wei Guo 018; Chip-Hong Chang; Yuan Cao 003; Shaojun Wei; Shouyi Yin; Chenchen Deng; Leibo Liu; Wei Ge; Fan Zhang 044 (ISCAS, 2019)

CDRing: Reconfigurable Ring Architecture by Exploiting Cycle Decomposition of Torus Topology. - Liang Wang 020; Leibo Liu; Xiaohang Wang 001; Jie Han 001; Chenchen Deng; Shaojun Wei (DAC, 2020)

A High-performance Hardware Implementation of Saber Based on Karatsuba Algorithm. - Yihong Zhu; Min Zhu 001; Bohan Yang 001; Wenping Zhu; Chenchen Deng; Chen Chen 083; Shaojun Wei; Leibo Liu (IACR Cryptol. ePrint Arch., 2020)

Aggressive Fine-Grained Power Gating of NoC Buffers. - Yibo Wu; Leibo Liu; Liang Wang 020; Xiaohang Wang 001; Jie Han 001; Chenchen Deng; Shaojun Wei (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A 60 Gb/s-Level Coarse-Grained Reconfigurable Cryptographic Processor With Less Than 1-W Power. - Chenchen Deng; Bo Wang 023; Leibo Liu; Min Zhu 001; Youyu Wu; Hui Li; Shouyi Yin; Shaojun Wei (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Jintide: Utilizing Low-Cost Reconfigurable External Monitors to Substantially Enhance Hardware Security of Large-Scale CPU Clusters. - Jianfeng Zhu 001; Ao Luo; Guanhua Li; Bowei Zhang 002; Yong Wang; Gang Shan; Yi Li; Jianfeng Pan; Chenchen Deng; Shouyi Yin; Shaojun Wei; Leibo Liu (IEEE J. Solid State Circuits, 2021)

LWRpro: An Energy-Efficient Configurable Crypto-Processor for Module-LWR. - Yihong Zhu; Min Zhu 001; Bohan Yang 001; Wenping Zhu; Chenchen Deng; Chen Chen 083; Shaojun Wei; Leibo Liu (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Software Defined Chips - Volume I, 2 - Shaojun Wei; Leibo Liu; Jianfeng Zhu 001; Chenchen Deng (Springer, 2022)

A Novel In-Sensor Computing Architecture Based on Single Photon Avalanche Diode and Dynamic Memristor. - Jiyuan Zheng; Shaoliang Yu; Jiamin Wu; Yuyan Wang; Chenchen Deng; Zhu Lin (CICAI (3), 2022)

A 28nm 48KOPS 3.4µJ/Op Agile Crypto-Processor for Post-Quantum Cryptography on Multi-Mathematical Problems. - Yihong Zhu; Wenping Zhu; Min Zhu 001; Chongyang Li; Chenchen Deng; Chen Chen 083; Shuying Yin; Shouyi Yin; Shaojun Wei; Leibo Liu (ISSCC, 2022)

An energy-efficient dynamically reconfigurable cryptographic engine with improved power/EM-side-channel-attack resistance. - Chenchen Deng; Min Zhu 001; Jinjiang Yang; Youyu Wu; Jiaji He; Bohan Yang 001; Jianfeng Zhu 001; Shouyi Yin; Shaojun Wei; Leibo Liu (Sci. China Inf. Sci., 2022)

RePQC: A 3.4-uJ/Op 48-kOPS Post-Quantum Crypto-Processor for Multiple-Mathematical Problems. - Yihong Zhu; Wenping Zhu; Chongyang Li; Min Zhu 001; Chenchen Deng; Chen Chen 083; Shuying Yin; Shouyi Yin; Shaojun Wei; Leibo Liu (IEEE J. Solid State Circuits, 2023)

M2STaR: A Multimode Spatio-Temporal Redundancy Design for Fault-Tolerant Coarse-Grained Reconfigurable Architectures. - Xiangyu Kong; Jianfeng Zhu 001; Xingchen Man; Guihuan Song; Yi Huang 036; Chenchen Deng; Pengfei Gou; Shouyi Yin; Shaojun Wei; Leibo Liu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

CATCAM: a 28 nm constant-time alteration TCAM enabling less than 50 ns update latency. - Chenchen Deng; Tianzhu Xiong; Zhaoshi Li; Zhiwei Liu; Yao Wang; Jianfeng Zhu 001; Jun Yang 006; Shaojun Wei; Leibo Liu (Sci. China Inf. Sci., 2024)

Software-defined process-near-memory architecture using 3D hybrid bonding integration. - Anlin Xu; Chenchen Deng; Jianfeng Zhu 001; Yao Wang; Shaojun Wei; Leibo Liu (Sci. China Inf. Sci., 2025)