Function flow: making synchronization easier in task parallelism. - Xuepeng Fan; Hai Jin 001; Liang Zhu; Xiaofei Liao; Chencheng Ye 001; Xuping Tu (PMAM, 2012)

An Adaptive Task Granularity Based Scheduling for Task-centric Parallelism. - Jianmin Bi; Xiaofei Liao; Yu Zhang 027; Chencheng Ye 001; Hai Jin 001; Laurence T. Yang (HPCC/CSS/ICESS, 2014)

Cybertron: pushing the limit on I/O reduction in data-parallel programs. - Tian Xiao; Zhenyu Guo; Hucheng Zhou; Jiaxing Zhang; Xu Zhao 004; Chencheng Ye 001; Xi Wang 005; Wei Lin 016; Wenguang Chen; Lidong Zhou (OOPSLA, 2014)

Optimal Cache Partition-Sharing. - Jacob Brock; Chencheng Ye 001; Chen Ding 001; Yechen Li; Xiaolin Wang 001; Yingwei Luo (ICPP, 2015)

MMC: a Many-core Memory Connection Model. - Chen Ding 001; Hao Lu; Chencheng Ye 001 (MEMSYS, 2015)

Compositional model of coherence and NUMA effects for optimizing thread and data placement. - Hao Luo 007; Jacob Brock; Pengcheng Li 001; Chen Ding 001; Chencheng Ye 001 (ISPASS, 2016)

Replacement Policies for Heterogeneous Memories. - Jacob Brock; Chencheng Ye 001; Chen Ding 001 (MEMSYS, 2016)

Write Locality and Optimization for Persistent Memory. - Dong Chen 015; Chencheng Ye 001; Chen Ding 001 (MEMSYS, 2016)

Memory equalizer for lateral management of heterogeneous memory. - Chencheng Ye 001; Chen Ding 001; Hai Jin 001 (MEMSYS, 2017)

Rochester Elastic Cache Utility (RECU): Unequal Cache Sharing is Good Economics. - Chencheng Ye 001; Jacob Brock; Chen Ding 001; Hai Jin 001 (Int. J. Parallel Program., 2017)

Cache Exclusivity and Sharing: Theory and Optimization. - Chencheng Ye 001; Chen Ding 001; Hao Luo 007; Jacob Brock; Dong Chen 015; Hai Jin 001 (ACM Trans. Archit. Code Optim., 2017)

Fine-grained data usage analysis by access sampling: seeing the data that is not there. - Zhizhou Zhang 002; Chencheng Ye 001; Rahman Lavaee; Ning Gu; Chen Ding 001 (MEMSYS, 2018)

Fast Miss Ratio Curve Modeling for Storage Cache. - Xiameng Hu; Xiaolin Wang 001; Lan Zhou; Yingwei Luo; Zhenlin Wang; Chen Ding 001; Chencheng Ye 001 (ACM Trans. Storage, 2018)

EMBA: Efficient Memory Bandwidth Allocation to Improve Performance on Intel Commodity Processor. - Yaocheng Xiang; Chencheng Ye 001; Xiaolin Wang 001; Yingwei Luo; Zhenlin Wang (ICPP, 2019)

Hardware-Based Domain Virtualization for Intra-Process Isolation of Persistent Memory Objects. - Yuanchao Xu 001; Chencheng Ye 001; Yan Solihin; Xipeng Shen (ISCA, 2020)

Hardware-Based Address-Centric Acceleration of Key-Value Store. - Chencheng Ye 001; Yuanchao Xu 001; Xipeng Shen; Xiaofei Liao; Hai Jin 001; Yan Solihin (HPCA, 2021)

Supporting Legacy Libraries on Non-Volatile Memory: A User-Transparent Approach. - Chencheng Ye 001; Yuanchao Xu 001; Xipeng Shen; Xiaofei Liao; Hai Jin 001; Yan Solihin (ISCA, 2021)

Temporal Exposure Reduction Protection for Persistent Memory. - Yuanchao Xu 001; Chencheng Ye 001; Xipeng Shen; Yan Solihin (HPCA, 2022)

Towards low-latency I/O services for mixed workloads using ultra-low latency SSDs. - Mingzhe Liu; Haikun Liu; Chencheng Ye 001; Xiaofei Liao; Hai Jin 001; Yu Zhang 027; Ran Zheng; Liting Hu (ICS, 2022)

FFCCD: fence-free crash-consistent concurrent defragmentation for persistent memory. - Yuanchao Xu 001; Chencheng Ye 001; Yan Solihin; Xipeng Shen (ISCA, 2022)

Preserving Addressability Upon GC-Triggered Data Movements on Non-Volatile Memory. - Chencheng Ye 001; Yuanchao Xu 001; Xipeng Shen; Hai Jin 001; Xiaofei Liao; Yan Solihin (ACM Trans. Archit. Code Optim., 2022)

SpecPMT: Speculative Logging for Resolving Crash Consistency Overhead of Persistent Memory. - Chencheng Ye 001; Yuanchao Xu 001; Xipeng Shen; Yan Sha; Xiaofei Liao; Hai Jin 001; Yan Solihin (ASPLOS (2), 2023)

Reconciling Selective Logging and Hardware Persistent Memory Transaction. - Chencheng Ye 001; Yuanchao Xu 001; Xipeng Shen; Yan Sha; Xiaofei Liao; Hai Jin 001; Yan Solihin (HPCA, 2023)

Software-Defined, Fast and Strongly-Consistent Data Replication for RDMA-Based PM Datastores. - Haodi Lu; Haikun Liu; Chencheng Ye 001; Xiaofei Liao; Fubing Mao; Yu Zhang 027; Hai Jin 001 (IPDPS, 2023)

VIDGCN: Embracing input data diversity with a configurable graph convolutional network accelerator. - Hao Ming; Tingting Pan; Dong Chen 015; Chencheng Ye 001; Haikun Liu; Liting Tang; Xiaofei Liao; Hai Jin 001 (J. Syst. Archit., 2023)

PMLiteDB: Streamlining Access Paths for High-Performance Persistent Memory Document Database Systems. - Hai Jin 001; Shuo Wei; Yan Sha; Chencheng Ye 001; Haikun Liu; Xiaofei Liao (IEEE Trans. Computers, 2023)

Accelerating Content-Defined Chunking for Data Deduplication Based on Speculative Jump. - Xiaozhong Jin; Haikun Liu; Chencheng Ye 001; Xiaofei Liao; Hai Jin 001; Yu Zhang 027 (IEEE Trans. Parallel Distributed Syst., 2023)

A Compilation Tool for Computation Offloading in ReRAM-based CIM Architectures. - Hai Jin 001; Bo Lei; Haikun Liu; Xiaofei Liao; Zhuohui Duan; Chencheng Ye 001; Yu Zhang 027 (ACM Trans. Archit. Code Optim., 2023)

Data Enclave: A Data-Centric Trusted Execution Environment. - Yuanchao Xu 001; James Pangia; Chencheng Ye 001; Yan Solihin; Xipeng Shen (HPCA, 2024)

I/O Causality Based In-Line Data Deduplication for Non-Volatile Memory Enabled Storage Systems. - Haikun Liu; Xiaozhong Jin; Chencheng Ye 001; Xiaofei Liao; Hai Jin 001; Yu Zhang 027 (IEEE Trans. Computers, 2024)

AccelES: Accelerating Top-K SpMV for Embedding Similarity via Low-bit Pruning. - Jiaqi Zhai; Xuanhua Shi; Kaiyi Huang; Chencheng Ye 001; Weifang Hu; Bingsheng He; Hai Jin 001 (HPCA, 2025)

DTAP: Accelerating Strongly-Typed Programs with Data Type-Aware Hardware Prefetching. - Yingshuai Dong; Chencheng Ye 001; Haikun Liu; Liting Tang; Xiaofei Liao; Hai Jin 001; Cheng Chen; Yanjiang Li; Yi Wang (ACM Trans. Archit. Code Optim., 2025)