Chip-to-chip Optical Data Communications using Polarization Division Multiplexing. - Darko Ivanovich; Chenfeng Zhao; Xuan Zhang 001; Roger D. Chamberlain; Amit Deliwala; Viktor Gruev (HPEC, 2020)

Executing Data Integration Effectively and Efficiently Near the Memory. - Chenfeng Zhao; Xuan Zhang 001; Roger D. Chamberlain (IEEE Des. Test, 2022)

SuperCut: Communication-Aware Partitioning for Near-Memory Graph Processing. - Chenfeng Zhao; Roger D. Chamberlain; Xuan Zhang 001 (CF, 2023)

GNNHLS: Evaluating Graph Neural Network Inference via High-Level Synthesis. - Chenfeng Zhao; Zehao Dong; Yixin Chen 001; Xuan Zhang 001; Roger D. Chamberlain (ICCD, 2023)

HLS Taking Flight: Toward Using High-Level Synthesis Techniques in a Space-Borne Instrument. - Marion Sudvarg; Chenfeng Zhao; Ye Htet; Meagan Konst; Thomas Lang; Nick Song; Roger D. Chamberlain; Jeremy Buhler; James H. Buckley (CF, 2024)

HLPerf: Demystifying the Performance of HLS-based Graph Neural Networks with Dataflow Architectures. - Chenfeng Zhao; Clayton J. Faber; Roger D. Chamberlain; Xuan Zhang 001 (ACM Trans. Reconfigurable Technol. Syst., 2025)