A 10-bit 100 MS/s Successive Approximation Register Analog-To-Digital Converter Design. - Jhin-Fang Huang; Wen-Cheng Lai; Cheng-Gu Hsieh (IEICE Trans. Electron., 2014)

An 8-bit 2 MS/s successive approximation register analog-to-digital converter for bioinformatics and computational biology Application. - Wen-Cheng Lai; Jhin-Fang Huang; Cheng-Gu Hsieh; Fan-Tsai Kao (ICNSC, 2015)